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Old 23-07-2004, 03:28 AM   #1
eva2000
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Exclamation Memtest86+ (v5.00 beta 4)

Update: Feb 2009 - Surprisingly, memory testing hasn't changed much even for latest X58/Core i7 platform. While it's relevance in actual memory stability has lessened for X58 in that for absolute memory stability you still need verification in windows stability tests, memtest is still very useful for diagnosing the system and memory. Most of what I wrote below for s754/s939/p35/x38/x48/p45/680i/780i systems still hold true for X58. For example, errors in test #5 are still more memory related and respond to vdimm voltage. Test #1-4 are more cpu/cache related and respond to vcore and even cpu vtt/vdimm balance voltages. When pushing uncore frequency beyond spec'd 2x DDRAM frequency, i used memtest86+ v2.11 as always... lack of cpu vtt volts = errors in test #1-4, lack of vdimm and/or IOH/ICH volts = errors in test #5 (results here).





March 7th, 2013: Memtest86+ 5.00 beta 4
March 4th, 2013: Memtest86+ 5.00 beta 3
- Added support for up to 2 TB of RAM on X64 CPUs
- Added multi-threading (SMT) support up to 32 cores
- Added complete detection for memory controllers.
- Added Motherboard Manufacturer & Model reporting
- Added CPU temperature reporting
- Added enhanced Fail Safe Mode (Press F1 at startup)
- Added support for Intel "Sandy Bridge-E" CPUs
- Added support for Intel "Ivy Bridge" CPUs
- Added preliminary support for Intel "Haswell" CPUs
- Added support for AMD "Bulldozer" CPUs
- Added support for AMD "Trinity" CPUs
- Added support for AMD E-/C-/G-/Z- "Bobcat" CPUs
- Added support for Intel Atom "Pineview" CPUs
- Added support for Intel Atom "Cedar Trail" CPUs
- Added SPD detection on most AMD Chipsets
- Enforced Coreboot support
- Optimized run time for faster memory error detection
- Rewriten lots of memory timings detection code
- Corrected bugs, bugs and more bugs

Known bugs
----------
- Changing tests or CPU affinity in config mode broken
Jan 25th, 2011: Memtest86+ v4.20
* New Features
o Added failsafe mode (press F1 at startup)
o Added support for Intel "Sandy Bridge" CPU
o Added support for AMD "fusion" CPU
o Added Coreboot "table forward" support
* Bug Fixes
o Corrected some memory brands not detected properly
o Various bug fixes


May 5, 2010: Memtest86+ v4.10
Memtest86+ v4.00 changelog
* New Features
o Added support for Core i7 Extreme CPU (32nm)
o Added support for Core i5/i3 (32 nm)
o Added support for Pentium Gxxxx (32 mn)
o Added support for Westmere-based Xeon
o Added preliminary support for Intel Sandy Bridge
o Added support for AMD 6-cores CPU
o Added detection for Intel 3200/3210
o New installer for USB Key
* Bug Fixes
o Corrected a crash at startup
o Many others bug fixes

September 23, 2009: Memtest86+ v4.00
Memtest86+ v4.00 changelog
* New Features
o Major Architectural changes
o First pass twice faster (reduced iterations)
o Detect DDR2/3 brands and part numbers on Intel DDR2/3 chipsets
o Added detection for Intel "Clarkdale" CPU
o Added detection for Intel "Gulftown" CPU
o Added detection for AMD "Magny-Cours" CPU
o Added detection for Intel XMP Memory
o Added for CPU w/ 0.5/1.5/3/6/12/16/18/24MB L3
o Added "clean" DMI detection for DDR3/FBDIMM2
o Better detection of Integrated Memory Controllers

* Bug Fixes
o Corrected detection for Intel "Lynnfield" CPU
o Corrected detection for AMD 45nm K10 CPU
o Solved crash with AMD Geode LX
o Complies with SMBIOS 2.6.1 specs
o Fixed compilation issues with gcc 4.2+
o Many others bug fixes
September 14, 2009: Memtest86+ v3.00b

Download:
Memtest86+ v3.00b changelog
o Major Architectural changes
o First pass twice faster (reduced iterations)
o Detect brands and part numbers
o Corrected detection for Intel "Lynnfield" CPU
o Added detection for Intel "Clarkdale" CPU
o Added detection for Intel "Gulftown" CPU
o Corrected detection for AMD 45nm K10 CPU
o Added detection for AMD "Magny-Cours" CPU
o Solved crash with AMD Geode LX
o Added detection for Intel XMP Memory
o Added for CPU w/ 0.5/1.5/3/6/12/16/18/24MB L3
o Added "clean" DMI detection for DDR3/FBDIMM2
o Better detection of Integrated Memory Ctrl
o Complies with SMBIOS 2.6.1 specs
o Fixed compilation issues with gcc 4.2+
o Many others bug fixes
December 27, 2008: Memtest86+ v2.11 http://www.memtest.org/

Memtest86+ V2.11 changelog
--------------------------
New Features
o Added support for Intel Core i5 (Lynnfield) CPU
o Added support for Intel P55 Southbridge
o Added support for Intel PM45/GM45/GM47 Mobile chipset
o Added support for Intel GL40/GS45 Mobile chipset

Bug Fixes
o Corrected DDR2/DDR3 detection on Intel x35/x45
o Corrected detection on some Core i7 CPU
o Fixed a bug with some AMI BIOS (freeze at startup)
o Various bug fixes
November 15, 2008: Memtest86+ v2.10 http://www.memtest.org/

Memtest86+ V2.10 changelog
--------------------------
New Features
o Added support for Intel Core i7 (Nehalem) CPU
o Added support for Intel Atom Processors
o Added support for Intel G41/G43/G45 Chipsets
o Added support for Intel P43/P45 Chipsets
o Added support for Intel US15W (Poulsbo) Chipset
o Added support for Intel EP80579 (Tolapai) SoC CPU
o Added support for ICH10 Southbridge (SPD/DMI)
o Added detection for Intel 5000X
o Now fully aware of CPU w/ L3 cache (Core i7 & K10)

Bug Fixes
o Added workaround for DDR3 DMI detection
o Fixed Intel 5000Z chipset detection
o Fixed Memory Frequency on AMD K10
o Fixed cache detection on C7/Isaiah CPU
o Fix Memtest86+ not recognized as Linux Kernel

Code:
February 22, 2008: Memtest86+ v2.01 http://www.memtest.org/

Memtest86+ V2.01 changelog -------------------------- - Solved a major bug in Memory Address Errors Reporting - Patched for Intel-Powered Mac - Pass duration 20% reduced - Solved a incoherency with pass progress indicator - Patched Makefile to compile on x86_64 - Added support for 45 nm Mobile Core 2 w/ 3 Mo L2 - Corrected Intel 3-Series (P35/X38) chipset init - Corrected a bug with SPD Display and ESB6300 - Correct a detection bug on P965/G965 C-Stepping - Added support for i945GM/PM/GME & i946PL/GZ - Added support for iGM965/iGL960/iPM965/iGME965/iGLE960 - Added detection for SiS 649/656/671/672 - Added detection for i430MX/i430TX - Added an optional beep mode (pass completed w/o error) - Removed the blinking cursor - Bootable Memtest86+ ISO more compatible - Reverted Test #0 to cached
February 8, 2008: Memtest86+ v2.0 http://www.memtest.org/
* New Features o Major Architectures changes o Modulo test now use random pattern for better accuracy o Added Advanced DMI Errors Reporting Mode o Added support for bus ratio changes on Intel Core CPU o Added support for non-integer bus ratio on latest Intel CPU o Added SPD Data Display for all Intel Chipsets (more to come) o Added serial support as a linux boot parameter (Thanks to Michal S.) o Added preliminary support for VIA CN Isaiah CPU o Added preliminary support for Intel Nehalem o Added support for VIA C7/C7-D/C7-M/Eden on Esther Core o Added support for AMD K10 (Phenom) CPU w/ timings detection o Added support for Intel Pentium E w/ 1 MB L2 Cache o Added support for Intel Core 2 45nm (Penryn) o Added support for FSB1333/FSB1600 Intel CPU o Added support for Intel 5400A/5400B w/ timings detection o Added support for Intel Q35/P35/G33/Q33 w/ timings detection o Added support for Intel X38/X48 w/ timings detection o Added preliminary support for Intel 5000P/V/Z o Removed on-fly memory timings change (unstable) * Bug Fixes o Numerous (really) bug fixes
================================================== While this Memtest86+ usage guide was written for DDR1, most of it still applies to DDR2 Intel testing from what I have experienced. v1.70 Bug at http://forum.x86-secret.com/showthread.php?t=5882
Seems like Memtest86+ V1.71 will come soon. I used an engineering-sample board of the 965P with an A0 stepping, and many things changed in the retail version. So, the support for this chipset doesn't work on Memtest86+ V1.70. No problem with the 975X. I'll receive a retail 965 board this week. V1.71 expected within one week.
January 15, 2007: Memtest86+ v1.70 released at http://www.memtest.org/
Enhancements: - Add new DMI polling feature - Add Support for Core/Core2 Solo/Duo/Quad CPU - Add Support for AMD K8 with DDR2 Memory - Add Support for Intel CPU with 192/384 KB L2 Cache - Add Support for FB- DIMM based memory (DMI) - Add Detection for ALI CyberAladdin- T (M1644) - Add Detection for Turion 64 X2 - Add Support for ATi Radeon xPress 3200 - Add Support for Intel i975X - Add Support for Intel Q965/P965 - Add Support for Intel Q963/Q965 Bug Fixes: - Force detection for AMD K8 with unknown chipsets
October 1, 2005: Memtest86+ v1.65 released at http://www.memtest.org/
Enhancements : - Add support for Intel Conroe/Merom/Woodcrest - Add support for Intel Yonah (0.65nm) - Add support for Intel Presler (0.65nm) - Add support for B-Step Smithfield - Add support for ALi/ULi 1689 & 1695 - Add support for ATi RS482 Bug Fixes : - Solve some P4 detected as Pentium D - Solve a bug with RAS detect on i955X - Solve a bug with K5 L1 detection size - Cosmetic : Mhz changed to MHz - Rewrite some code to avoid warning with gcc 4 - Solve Fedora bugzilla Bug #162373
June 27, 2005: Memtest86+ v1.60 released at http://www.memtest.org/
# New Features * Added Detection for Pentium D * Added Detection for Athlon & Opteron Dual Core * Added Detection for 90 nm Athlon 64 / Sempron * Added Detection for 90 nm Opteron * Added experimental detection for Intel E8500 * Added detection for VIA KT880 # Bug Fixes * Correct Venice core detected as 0.13 Ám * Correct AMD751 not detected since 1.55 * Correct i855/DDR333 detection bug * Correct E7xxx ECC polling (thanks to S. Wangnick) * Removed E7520 ECC Support (not reliable) * Added BadRAM patch * Some minor bug fixes.
Mar 29, 2005: Memtest86+ v1.55 released at http://www.memtest.org/ seems there's a divider bug in 1.55 and 1.55.1 fixes it http://www.memtest.org/download/1.55.1/
** Enhancements ** - Added support for Intel E7221 - Added support for nForce 4 Intel Edition - Added detection for ATi Radeon Xpress 200 - Added ECC polling for Intel E7221 ** Bug Fixes ** - More precise detection of K8 Memory Freq. - Some minor bug fixes.
Feb 16, 2005: Memtest86+ v1.51 released at http://www.memtest.org/
# New Features * Added support for Intel i955X (Glenwood) * Added support for nVidia nForce4 # Bug Fixes * Fix a bug on K8 chipset recognition * Fix Dual channcel not detected on i865/875 (Bug added in V1.50) * Some minor bug fixes.
Jan 23, 2005: Memtest86+ v1.50 released at http://www.memtest.org/
*** Enhancements in v1.50 : *** * New Features o Added support for Intel i945P/G (Lakeport) o Added support for Intel i915PM/GM (Alviso) o Added support for Intel E7520 (Lindenhurst) o Added support for Intel E7520 (Lindenhurst-VS) o Added support for P4 6xx serie o Rewrite all Athlon 64 detection code (for 90nm) o An uncached test is back in Menu 1 (Experimental) * Bug Fixes o Fix Dual DDR-I not detected on i915P/G o Fix DDR333/400 ratio error on i915P/G o Fix i855 & DDR333 not detected o Correct Celeron M Dothan not detected o Other minor bug fixes
Nov 30, 2004: Memtest86+ v1.40 released at http://www.memtest.org/
# New Features * Based on Memtest86 3.2 * New "random pattern" tests for stronger verification # Bug Fixes * Solved many bugs in the original mt86 3.2 code * Solved an issue with Lakeport chipset * Many others bug fixes
Nov 8, 2004: Memtest86+ v1.30 released at http://www.memtest.org/
New Features Added a "Fast" Mode (with MTRR & L1/L2 Caches on) Added support for VIA K8T890 Added on-fly timings change on some chipsets (Thanks to Eric and Wee) Added i852/855 on-fly timing change Bug Fixes Rewrite caches-off function (Disable MTRR for stronger test) Some others bug fixes ----------------------- In this version, I rewrited the "cache-off" function in order to really disable all kind of caching. MTRR are now disabled if previously activated. That can result in a memtest86+ pass two times slower (but stronger) on Pentium 4. I also added a "fast" mode, with caching always on. Faster, but a bit less effective. So, the standard test in Memtest86+ v1.30 is now stronger on CPU with MTRR enabled by BIOS (All Pentium 4). On these CPU, the new "Fast mode" is what we called Standard in Memtest86+ V1.27 or less. Memtest86+ V1.30 now includes an experimental support for on-fly timings change (See Menu). The idea and base code was provided by Eric & Wee, two talented engineers from a well-known memory maker. Their code was checked, optimized and I added support for i852/855 chipsets. Memory makers contributions are welcome, but memtest86+ will *NEVER* become a vendor-specific tool and all addition will be carrefuly checked before additions. Some guys already tried to offer money to disable or "modify" a test which was accused to produce "too many" errors on their memory modules...
Oct 14, 2004: Memtest86+ v1.27 released at http://www.memtest.org
*** Enhancements in v1.27 : *** New Features Add Support for nVidia nForce 4 Add Support for FSB1066 P4 EE Add Support for Intel i925XE Add Support for 90nm Athlon 64 Add a special "Beep on Error" Mode (See Menu #6) Bug Fixes Correct Athlon 64 detected as Sempron Solve the P4 0.18 Ám FSB detection bug Some code optimizations
Sept 12, 2004: Memtest86+ v1.26 released available at http://i4memory.com/f79/memtest86-v2...ww.memtest.org
New Features Added support for K6-II+ / K6-III+ Bug Fixes Bug Fixed with i915/925X DDR2-600 memory ratio
Sept 1, 2004: New improved version of memtest86+ v1.25 available at http://i4memory.com/f79/memtest86-v2...ww.memtest.org
New Features Added advanced dectection for E7500/E7501 (Thanks to Tyan) Added support for FSB533 LGA775 CPU Added support for DDR2-600 mode on i915/925. Added detection for Xeon DP/MP Added detection for AMD K8 Sempron Added detection for SiS 661 Added a new .EXE distribution file for USB Key Bug Fixes Bug Fixes with i915/925X memory ratio Rewrite the buggy E7500/E7501 ECC Polling code Fixed the KT133/266 freeze bug (again) Fixed crash with ATi RS300 & Pentium M Some bugs fixes & code optimization




...........................
Well since it has been brought up so many times i thought i'd post my thoughts on memtest86 and how i test

General

memtest ain't 100% but you can use memtest to guage the max possible FSB/MEM which is the top limit of what you can expect... since i don't think i've ever experienced windows 100% stability and error free at a speed higher than the highest memtest passable speed

therefore

max FSB/MEM speed (100% windows error free/stability) <= max FSB/MEM speed (memtest error free)

My experiences and testing methods

test #1 - 4
Are cpu fsb speed and or vcore related (meaning lowering fsb or increasing vcore saw errors in these tests disappear). X58 platform, vcore and cpu vtt/vdimm balance related. Freeze at borderline max BCLK may respond to IOH/ICH related voltages at least on DFI X58 boards but all depends on core i7 cpu.

test #5
Prior to 865/875 boards - memory speed, timings and vdimm related (meaning altering mem speed, timings and/or vdimm saw errors in this test disappear). X58 platform, still memory related and vdimm and cpu vtt balance are main related voltages. Also could be IOH/ICH voltage related on memory and uncore frequency overclocking.

test#6
With 865/875 boards bigtoe has said related to cycle time (tras) in cpuz which i sort of confirmed with my current testing. Note: prior to 865/875 boards, i've never had memory errors in test #6 only since these new boards have i experienced test #6 errors. X58 platform, can be memory related but don't see many errors when testing there so not sure.

test #7
Not sure very rarely have i experienced errors on P4 865PE/875P platform. However, on AMD64 sometimes errors can so if mem vdimm isn't enough. On P35/X38/X48/P45 platform looping test #7 can help determine max stable FSB. When reaching limit of FSB on such platforms, it can freeze in test #7. X58 platform, borderline max BCLK stability test seems only, it will freeze looping test #7 if BCLK is unstable or if you're lacking vdimm/cpu vtt volts.

test #8
Is a more intensive version of test #5 for memtest86+ versions below v1.40 - v1.40 and higher test routine changed. AMD64 s939 test #8 also should be looped for memory/timing/vdimm related stability. Try also messing with chipset or LDT voltage to get memory to pass this test.

Most memory related errors pop up at test #5 and #7/8 for AMD64, hence i like looping test #5, 7 and 8 for memory testing for 12-24hrs after 1-4hr general standard loop of test #1-7

i like to loop test #3 and/or #4 (now #6 in v1.40 and higher) for cpu related issues

I follow it up with at least goldmem 5.07:

2 quick test loops
+
2-4 full standard loops <-- can take forever trying doing it with 4 x 512mb xms3200c2

to loop a particular test

for v1.40
in memtest hit keyboard key

C -> 1 -> 3 > and then select a test number to loop

spacebar = locks screen so it shows the very first error so where ram first errors out

enter key = unlocks screen
for <v1.27
in memtest hit keyboard key

C -> 2 -> 5 or 6 (5 for v1.27 and lower, v1.30 now need to press 6) and then select a test number to loop

spacebar = locks screen so it shows the very first error so where ram first errors out

enter key = unlocks screen
this is done, before i even load windows... if theres errors in above stage memtest or goldmem stages, i don't even bother loading windows or benching

i realise not everyone has time to do this but i like to know exactly what i get (ram) and how it performs

some people just load windows and see if it crashes or is stable... but you can't see why it crashes or isn't stable - is it the memory or cpu related etc

it makes it easier to test when you have more than 1 pc and a kvm switch to control 2-4 pcs from the same console

update: Aug 10, 2003

Interesting while reading up on memtest86 I found something i didn't catch before, the description of test #4 http://memtest86.com/#details - now in v1.40 it's changed to test #6

Test 4 [Moving inv, 32 bit pat, cached]

This is a variation of the moving inversions algorithm that shifts the data pattern left one bit for each successive address. The starting bit position is shifted left for each pass. To use all possible data patterns 32 passes are required. This test is effective in detecting data sensitive errors in "wide" memory chips.
so if you're running standard test #1-7 the bare minimum passes you're want to run would be = 32 passes to test all data patterns

For 256MB stick to do 32 standard test passess of test #1-7 would take between 75-160 minutes - longer for more memory

update: June 1, 2004: - added some snap shots for memtest86+ v1.11

here's some snapshots of memtest86+ v1.1 in action on various boards i tested



list of commands

Code:
  Command  Description

  ESC   Exits the test and does a warm restart via the BIOS.

  c     Enters test configuration menu
	    Menu options are:
               1) Cache mode
               2) Test selection
               3) Address Range
               4) Memory Sizing 
               5) Error Summary
               6) Error Report Mode
	       7) ECC Mode
               8) Restart Test
               9) Reprint Screen

  SP    Set scroll lock (Stops scrolling of error messages)
	Note: Testing is stalled when the scroll lock is
	set and the scroll region is full.

  CR    Clear scroll lock (Enables error message scrolling)
Individual Test Descriptions for v1.40 onwards

Test 0 [Address test, walking ones, no cache]

Tests all address bits in all memory banks by using a walking ones address pattern.

Test 1 [Address test, own address]

Each address is written with its own address and then is checked for consistency. In theory previous tests should have caught any memory addressing problems. This test should catch any addressing errors that somehow were not previously detected.

Test 2 [Moving inversions, ones&zeros]

This test uses the moving inversions algorithm with patterns of all ones and zeros. Cache is enabled even though it interferes to some degree with the test algorithm. With cache enabled this test does not take long and should quickly find all "hard" errors and some more subtle errors. This test is only a quick check.

Test 3 [Moving inversions, 8 bit pat]

This is the same as test one but uses a 8 bit wide pattern of "walking" ones and zeros. This test will better detect subtle errors in "wide" memory chips. A total of 20 data patterns are used.

Test 4 [Moving inversions, random pattern]

Test 4 uses the same algorithm as test 1 but the data pattern is a random number and it's complement. This test is particularly effective in finding difficult to detect data sensitive errors. A total of 60 patterns are used. The random number sequence is different with each pass so multiple passes increase effectiveness.

Test 5 [Block move, 64 moves]

This test stresses memory by using block move (movsl) instructions and is based on Robert Redelmeier's burnBX test. Memory is initialized with shifting patterns that are inverted every 8 bytes. Then 4mb blocks of memory are moved around using the movsl instruction. After the moves are completed the data patterns are checked. Because the data is checked only after the memory moves are completed it is not possible to know where the error occurred. The addresses reported are only for where the bad pattern was found. Since the moves are constrained to a 8mb segment of memory the failing address will always be less than 8mb away from the reported address. Errors from this test are not used to calculate BadRAM patterns.

Test 6 [Moving inversions, 32 bit pat]

This is a variation of the moving inversions algorithm that shifts the data pattern left one bit for each successive address. The starting bit position is shifted left for each pass. To use all possible data patterns 32 passes are required. This test is quite effective at detecting data sensitive errors but the execution time is long.

Test 7 [Random number sequence]

This test writes a series of random numbers into memory. By resetting the seed for the random number the same sequence of number can be created for a reference. The initial pattern is checked and then complemented and checked again on the next pass. However, unlike the moving inversions test writing and checking can only be done in the forward direction.

Test 8 [Modulo 20, ones&zeros]

Using the Modulo-X algorithm should uncover errors that are not detected by moving inversions due to cache and buffering interference with the the algorithm. As with test one only ones and zeros are used for data patterns.

Test 9 [Bit fade test, 90 min, 2 patterns]

The bit fade test initializes all of memory with a pattern and then sleeps for 90 minutes. Then memory is examined to see if any memory bits have changed. All ones and all zero patterns are used. This test takes 3 hours to complete. The Bit Fade test is not included in the normal test sequence and must be run manually via the runtime configuration menu.

Last edited by eva2000; 07-03-2013 at 10:14 AM.
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Old 12-09-2004, 04:57 PM   #2
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Memtest Version 1.26 Has Been Released

http://www.memtest.org/#downiso

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Old 12-09-2004, 06:00 PM   #3
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thanks for the heads up
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Old 13-09-2004, 07:23 PM   #4
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Download - Pre-Compiled Bootable ISO (.gz) - 36.7 KB - MD5 Hash : 5dbfa127db99c190ce3b149af13841f6
Download - Pre-Compiled Bootable ISO (.zip) - 36.7 KB - MD5 Hash : 28e6b13e1d2374ab9c360d2253a6cd46


Download - Pre-Compiled Bootable Binary (.gz) - 34.1 KB - MD5 Hash : 71f8e0ba36e3d994cc5cdccd24df24ef
Download - Pre-Compiled Bootable Binary (.zip) - 34.0 KB - MD5 Hash : c0ff9e281521ca6abc8fd5798c1c7743


Download - Pre-Compiled EXE file for USB Key (Pure DOS) - 35.1 KB - MD5 : 222b75e8061a3c471fac014f4c5190cc


Download - Pre-Compiled package for Floppy (DOS - Win) - 55.1 KB - MD5 : 9d430d89effd53c33cd724815e1bcfd1



Which one do you download ?????
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Old 14-09-2004, 03:50 AM   #5
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Pre-Compiled Bootable ISO (.zip) = CD

Pre-Compiled package for Floppy (DOS - Win) = Floppy

Pre-Compiled EXE file for USB Key (Pure DOS) = USB drive
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Old 14-09-2004, 09:38 PM   #6
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that usb drive thing is a great idea
might try and find like a 16mb one
better than burning the memtest iso that's only a few kb onto a dvd-r
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Old 19-09-2004, 06:37 PM   #7
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By ArcTan
that usb drive thing is a great idea
might try and find like a 16mb one
better than burning the memtest iso that's only a few kb onto a dvd-r
let me know how the USB drive methods works
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Old 20-09-2004, 05:46 PM   #8
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Wonder if it would work using the USB method with a SD card and reader ??

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