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3x2GB Kingston HyperX T1 2000CAS8 - Elpida 50mm Hyper - X48 DDR3 tests - i4memory.com - different look at memory

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Old 09-06-2009, 12:57 AM   #1
eva2000
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Exclamation 3x2GB Kingston HyperX T1 2000CAS8 - Elpida 50mm Hyper - X48 DDR3 tests

Lots of folks have reported the new Elpida 50mm Hyper IC modules used for the high end triple channel memory kits fairs pretty well for overclocking on X48 DDR3 platform. So decided to check it out with my 3x2GB Kingston HyperX T1 DDR3-2000Mhz CAS8 Triple Channel kit (KHX16000D3ULT1K3/6GX) on Asus Rampage Extreme as my DFI UT X58-T3EH8 is occupied for other tests.





System:
  • E3110 Q750A158
  • OCZ Vendetta 2 Air
  • Asus Rampage Extreme 1104 bios
  • 128MB Gainward FX5200 PCI
  • 3x 2GB Kingston HyperX T1 DDR3-2000Mhz CAS8 Triple Channel kit (KHX16000D3ULT1K3/6GX)
  • 1TB Samsung SATAII
  • Pioneer 216 DVD-RW
  • Corsair HX1000
  • WinXP Pro SP3 nLite fully updated

Lots of folks have reported 3x2GB Kingston HyperX T1 DDR3-2000Mhz CAS8 Triple Channel kits having a module failure or a poor module within their 3x2GB kit on X58 platform. So I decided to kill 2 birds with 1 stone so to speak. I will test each 2GB module individually on Rampage Extreme's optimal dimm slots A2+B2. Each 2GB module will be tested on A2 and then B2 dimm slots using quick Memtest86+ v2.11 loop test #5 for 10 passes minimum. Not a stressful test but enough to weed out which 2GB modules are the better of the 3 modules to be paired for dual channel 2x2GB operation on Rampage Extreme.

I used a bit of masking tape to label each 2GB module - #1, #2 and #3 modules respectively.

Results


Results for 8.5x cpu multiplier and main 8-8-8-24 timings on 266FSB Strap 1:2 divider.

At certain frequency subtimings for tRTR_S/RTR_D and tWTW_S/WTW_D had to be reduced to 5/9 for each pair for read to read same and different ranks and write to write same and different ranks respectively to pass test #5 loop. This reduced memtest reported bandwidth by ~10.5%. Still great once you factor in dual channel bandwidth will be higher.

i.e. at 950mhz and 960mhz respectively bandwidth dropped from AUTO subtimings to manually set to above from 6145MB/s to 5500MB/s and 6210MB/s to 5558MB/s.

With looser subtimings for at:
  • tRTR_S= 5
  • tRTR_D = 9
  • tWTW_S = 5
  • tWTW_D = 9
  • 970mhz = 5616MB/s
  • 990mhz = 5732MB/s
  • 1000mhz = 5790MB/s

Module #1 in A2 dimm slot
  • 940mhz PASSED - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -20.0mv with A2 Clk Skew = Advance 250ps
  • 950mhz PASSED tRTR_S/RTR_D 5/9 tWTW_S/WTW_D 5/9 - 1.72306v vdimm, 1.60372v NB, NB DDRVREF -17.5mv with A2 Clk Skew = Advance 250ps
  • 960mhz FAILED 1PE10 tRTR_S/RTR_D 5/9 tWTW_S/WTW_D 5/9 - 1.73631v vdimm, 1.60372v NB, NB DDRVREF -17.5mv with A2 Clk Skew = Advance 350ps

Module #2 in A2 dimm slot
  • 940mhz PASSED - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv with A2 Clk Skew = Advance 250ps
  • 950mhz PASSED - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv with A2 Clk Skew = Advance 350ps
  • 960mhz PASSED tRTR_S/RTR_D 5/9 tWTW_S/WTW_D 5/9 - 1.72306v vdimm, 1.60372v NB, NB DDRVREF -17.5mv with A2 Clk Skew = Advance 350ps
  • 970mhz PASSED tRTR_S/RTR_D 5/9 tWTW_S/WTW_D 5/9 - 1.72306v vdimm, 1.60372v NB, NB DDRVREF -17.5mv with A2 Clk Skew = Advance 350ps
  • 980mhz PASSED tRTR_S/RTR_D 5/9 tWTW_S/WTW_D 5/9 - 1.72306v vdimm, 1.60372v NB, NB DDRVREF -17.5mv with A2 Clk Skew = Advance 350ps
  • 990mhz PASSED tRTR_S/RTR_D 5/9 tWTW_S/WTW_D 5/9 - 1.72306v vdimm, 1.60372v NB, NB DDRVREF -17.5mv with A2 Clk Skew = Advance 350ps
  • 1000mhz PASSED tRTR_S/RTR_D 5/9 tWTW_S/WTW_D 5/9 - 1.74956v vdimm, 1.60372v NB, NB DDRVREF -17.5mv with A2 Clk Skew = Advance 350ps

Module #3 in A2 and B2 dimm slot
  • WTF even at 666mhz 8-8-8-24 = DET DDRAM error on POSTLED code couldn't boot system in A2 dimm slot.
  • Moved to B2 dimm slot and only after clearing CMOS got CMOS ERROR POSTLED code.
  • So installed module #1 in A2 and problematic module #3 in B2 dimm slots and it booted into bios fine after clearing CMOS. SPD values read 9-9-9-24 tRFC 74 with 1.64v default vdimm set by bios.
  • So in B2 dimm slot tried 8-8-8-24 and again = DET DDRAM error no boot.
  • So in B2 dimm slot change to 9-9-9-24 timinsg and it booted up into memtest fine at 1.67v but to get into windows needed 1.7v but windows seems like it had some graphic/display corruption!
  • Down clocked memory to DDR3-1066Mhz 9-9-9-24 and windows didn't have corruption enough to get a screenshot of cpuz spd for both module #1 and #3 together as i wanted to grab the SPDTool profile for them but system rebooted due to module #3 instability before I could open up SPDTool
  • Looks like module #3 is really a dud

Module #3 cut short my tests for B2 dimm slot testing, so will do that later with module #1 and #2 in B2 and update this post with the results later on.

Conclusion:
As you can see module #1 didn't fair that well compared to module #2. At 950mhz it already required the 4 mentioned subtimings to be loosened at least 10mhz earlier/lower than when module #2 needed to touch those subtimings. Module #2 continued to scale all the way to 990Mhz at same vdimm voltage until 1000Mhz which needed vdimm bump from 1.72306v to 1.74956v. I didn't apply much more vdimm over that for 2GB single module testing so as to leave room for when dual channel is tested which will require more vdimm usually. Module #3 on the other hand was a complete dud which I'd deem faulty by any definition

As you can see there are differences amongst the 3x 2GB modules even on X48. Will these differences translate over on X58 in triple channel mode ? Are these differences one explanation as to reason some folks reporting these 3x2GB Kingston HyperX T1 2000 CAS8 kits have one module failing or not hitting rated speeds ??

Module #3 was a disappointment and could be reason why on DFI UT X58-T3EH8 i got 4GB detected out of 6GB in a few different module/dimm slot combinations. If the modules were placed in a certain dimm slot configuration, all 6GB was detected at DDR3-2000Mhz 8-8-8-24 on DFI UT X58-T3EH8. Same with certain CPU VTT and VDIMM combinations 6GB was detected instead of 2GB or 4GB (memory tip #6). But didn't test this kit much as Corsair Dominator GT kit was busy on DFI UT X58-T3EH8.

I'd say worth looking into testing each module individually if you are having 3x2GB issues on X58 platform as well. Of course module #3 would be deemed faulty for not running rated timings at least 8-8-8-24 for lowly DDR3-1066mhz to DDR3-1333Mhz underclock!.
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Old 09-06-2009, 02:05 AM   #2
DrNip
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Very interesting. These HyperX's are same dang good RAM but only if you get 3 sticks that work! Nice write up as usual eva2000.
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Old 09-06-2009, 03:50 AM   #3
eva2000
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Yeah very unfortunate as I really was hoping #3 would be matching #2 for 1000mhz possibilities in dual channel

Interesting starting dual channel with module #1 (B2) + #2 (A2 banks) and at DDR3-1600 8-8-8-24 already memtest reports 5,878MB bandwidth but dozen or so test #5 errors but loosening the 4 above sub timings help reduced the errors somewhat so far to 1 or 2 errors per pass.
  • tRTR_S= 4 change to 6
  • tRTR_D = 7 change to 9
  • tWTW_S = 4 change to 6
  • tWTW_D = 7 change to 9
resulting bandwidth is still 5,878MB/s in dual channel so room to move i think for stbaility. Changing tRTR_S and tWTW_S to 7 dropped bandwidth to 5,691MB/s

Seems advancing skews for both A2/B2 CLK Skew to 150ps and 200ps respectively along with 8-9-8-9 for subtimings and NB DDRVREF at -17.5mv have me error free looping test #5 (each pass for 2x2GB config takes 130 seconds to complete) - did 10 pass loop without errors. Huge difference to 1000s of errors without CLK skew tweaking! Memtest reported bandwidth still at 5,691MB/s ! Starting tests at DDR3-1700Mhz 8-8-8-24 and error free so far.. without touching any voltages for memory or NB yet!

Last edited by eva2000; 09-06-2009 at 04:46 AM.
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Old 11-06-2009, 02:57 AM   #4
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2x2GB Kingston HyperX T1 2000CAS8 Elpida 50mm Hyper modules pretty hard to find stable points even for just HyperPi dual 32M run. So far with skew and other voltage tweaks set, managed to pull off DDR3-1820Mhz 8-8-8-24 AUTO CMD rate is apparently 2T at 1.723v vdimm.



BIOS : 1104
Code:
Ai Overclock Tuner : Manual
Oc From Cpu Levet Up : Auto
Oc From Memory Level Up : Auto
FSB Frequency : 455
CPU ratio sitting : 8.5

CPU configuration : 
--------------------------- : 
C1E support : disabled
Cpu TM function : disabled
Max CPUID value limit : disabled
Vanderpool technology : disabled
Execute disable bit : disabled
Core multi-processing : enabled

* CPU clock skew : Auto
* NB clok skew : Auto
FSB Strap to North Bridge : 266FSB
PCIE Frequency : 103
DRAM Frequency : DDR3-1823mhz 
DRAM Command Rate : AUTO
DRAM Timing Control : Manual

1ST INFORMATION
CAS# latency : : 8
RAS# to CAS# delay : : 8
RAS# PRE time : 8
RAS# ACT time : 24
RAS# to RAS# delay : AUTO
REF cycle time : AUTO
WRITE recovery time : AUTO
READ to PRE time : AUTO

2ND INFORMATION
READ to WRITE delay(S/D) : AUTO
WRITE to READ delay(S) : AUTO
WRITE to READ delay(D) : AUTO
READ to READ delay(S) : 9
READ to READ delay(D) : 11
WRITE to WRITE delay(S) : 9
WRITE to WRITE delay(D) : 11

3RD INFORMATION
WRITE to PRE delay : AUTO
READ to PRE delay : AUTO
PRE to PRE delay : AUTO
ALL PRE to ACT delay : AUTO
ALL PRE to REF delay : AUTO

DRAM Static Read Control : disabled or AUTO
DRAM Dynamic Write Control : disabled or AUTO

DRAM Skew Control :
------------------------------ : 
DRAM CMD skew on channel A : auto
DRAM CLK skew on DIMM A1 : auto
DRAM CLK skew on DIMM A2 : advance 300ps
DRAM CTL skew on DIMM A1 : auto
DRAM CLT skew on DIMM A2 : delay 100ps

DRAM CMD skew on channel B : auto
DRAM CLK skew on DIMM B1 : auto
DRAM CLK skew on DIMM B2 : advance 250ps
DRAM CTL skew on DIMM B1 : auto
DRAM CTL skew on DIMM B2 : auto

Ai Clock Twister: AUTO 
Ai Transaction Booster: AUTO /

-- Manual -- = AUTO

Common Performance Level : 08

Pull-in of CHA PH1 : disabled : 
Pull in of CHA PH2 : disabled :
Pull in of CHB PH1 : disabled :
Pull in of CHB PH2 : disabled :

-- Manual -- 

EPU II phase control : auto or full phase

CPU Voltage : 1.28750v
Load-line calibration : Disabled
CPU PLL voltage : 1.56406v
FSB termination voltage : 1.28566v
CPU GTLVref(0) : auto
CPU GTLVref(1) : auto
CPU GTLVref(2) : auto
CPU GTLVref(3) : auto
NB GTLVref : auto
North bridge voltage : 1.59656v
DRAM voltage : 1.72362v
NB DDRVref : -17.5mv
DDR3 channel A Vref : -02.5mv
DDR3 channel B Vref : auto
South bridge 1.5 voltage : 1.56406v
South bridge 1.05 voltage : 1.06039v
CPU spread spectrum : disabled
PCIE spread spectrum : disabled

Memory Remap Feature: Enabled
not sure how other elpida 50mm hyper compare on Rampage Extreme/X48 DDR3 boards in terms of mhz to vdimm scaling ?
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Old 26-06-2009, 02:41 PM   #5
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My RMA replacements arrived today - minus the original box packaging hehe




Fingers crossed
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Old 26-06-2009, 04:30 PM   #6
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Fingers crossed
better cross your toes too
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Old 26-06-2009, 08:12 PM   #7
eva2000
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haha we shall see

Bit of info from Kingston regarding the labels on modules - interesting to see the results of Kingston 2000C8 in relation to their serial numbers


Last edited by eva2000; 26-06-2009 at 08:18 PM.
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Old 27-06-2009, 03:03 AM   #8
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RMA Replacement
Individual 2GB Kingston 2000C8 Tests


Clearly, you can see that the replacement kit is much better and working very nicely for Vdimm required as well.

Same Memtest86+ v2.11 test #5 10x loops with reported bandwidth and settings used. For initial tests trying to keep VDIMM as close to 1.65v rated volts first - the aim is to see how high I can clock the memory without errors at such VDIMM voltage.

For failed passed, short hand 1PE38 = 1st pass 38 errors

8-8-8-24 timings
CPU FSB = 1.27241v
CPU PLL = SB = 1.53756v


Module #1 in A2 dimm slot
  • 920mhz 5951MB/s PASSED - 1.65681v vdimm, 1.57v NB
  • 930mhz 6016MB/s PASSED - 1.65681v vdimm, 1.60372v NB, A2 Clk Skew = Advance 250ps
  • 940mhz 6080MB/s PASSED - 1.65681v vdimm, 1.60372v NB, A2 Clk Skew = Advance 250ps
  • 950mhz 6145MB/s PASSED - 1.65681v vdimm, 1.60372v NB, A2 Clk Skew = Advance 350ps
  • 960mhz 6210MB/s FAILED 1PE38 - 1.65681v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps
  • 960mhz 6210MB/s FAILED 1PE18 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps
  • 960mhz 5558MB/s PASSED tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps
  • 970mhz 5616MB/s PASSED tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps
  • 980mhz 5674MB/s PASSED tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps
  • 990mhz 5732MB/s PASSED tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps
  • 1000mhz 5790MB/s PASSED tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps
  • 1010mhz 5848MB/s PASSED tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps
  • 1020mhz 5906MB/s FAILED 2PE2 tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.68351v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps

Module #2 in A2 dimm slot
  • 920mhz 5951MB/s PASSED - 1.65681v vdimm, 1.55v NB
  • 930mhz 6016MB/s PASSED - 1.65681v vdimm, 1.60372v NB, A2 Clk Skew = Advance 250ps
  • 940mhz 6080MB/s PASSED - 1.65681v vdimm, 1.60372v NB, A2 Clk Skew = Advance 250ps
  • 950mhz 6145MB/s PASSED - 1.65681v vdimm, 1.60372v NB, A2 Clk Skew = Advance 300ps
  • 960mhz 6210MB/s PASSED - 1.65681v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps
  • 970mhz 5616MB/s PASSED tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps
  • 980mhz 5674MB/s PASSED tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps
  • 990mhz 5732MB/s PASSED tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps
  • 1000mhz 5790MB/s PASSED tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps
  • 1010mhz 5848MB/s FAILED 1PE88 tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps

Module #3 in A2 dimm slot
  • 920mhz 5951MB/s PASSED - 1.65681v vdimm, 1.55v NB
  • 930mhz 6016MB/s PASSED - 1.65681v vdimm, 1.60372v NB, A2 Clk Skew = Advance 250ps
  • 940mhz 6080MB/s PASSED - 1.65681v vdimm, 1.60372v NB, A2 Clk Skew = Advance 250ps
  • 950mhz 6145MB/s PASSED - 1.65681v vdimm, 1.60372v NB, A2 Clk Skew = Advance 250ps
  • 960mhz 6210MB/s PASSED - 1.65681v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps
  • 970mhz 6275MB/s FAILED 1PE72 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps
  • 970mhz 5616MB/s FAILED 1PE2 tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps
  • 970mhz 5616MB/s FAILED 4PE2 tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -20.0mv, A2 Clk Skew = Advance 350ps
  • 970mhz 5616MB/s FAILED 2PE2 tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -22.5mv, A2 Clk Skew = Advance 350ps
  • 970mhz 5616MB/s FAILED 7PE2 & 11PE2 tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.61697v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps
  • 970mhz 5616MB/s FAILED 1PE16 tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.63072v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps
  • 970mhz 5616MB/s FAILED 1PE2 tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.59047v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps
  • 970mhz 5616MB/s PASSED tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.65681v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps
  • 980mhz 5674MB/s PASSED tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.65681v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps A2 CTL Skew = Delay 100ps
  • 990mhz 5732MB/s FAILED 1PE18 tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.65681v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps A2 CTL Skew = Delay 100ps
  • 990mhz 5732MB/s PASSED tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps A2 CTL Skew = Delay 100ps
  • 1000mhz 5790MB/s FAILED 1PE12 tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps A2 CTL Skew = Delay 100ps
  • 1000mhz 5790MB/s FAILED 1PE14 tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps A2 CTL Skew = Delay 125ps
  • 1000mhz 5790MB/s FAILED 1PE16 tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.61697v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps A2 CTL Skew = Delay 100ps
  • 1000mhz 5790MB/s FAILED 1PE22 tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps A2 CTL Skew = Delay 75ps
  • 1000mhz 5790MB/s FAILED 1PE4 tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps A2 CTL Skew = Delay 100ps, CPU Clock kew = Delay 100ps
  • 1000mhz 5790MB/s FAILED 1PE28 tRTR_S/RTR_D 6/9 tWTW_S/WTW_D 6/9 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps A2 CTL Skew = Delay 100ps
  • 1000mhz 5790MB/s FAILED 1PE16 tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps A2 CTL Skew = Delay 100ps, FSB Strap = 333FSB
  • 1000mhz 5790MB/s FAILED 1PE18 tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.60372v NB, NB DDRVREF -17.5mv, A2 Clk Skew = Advance 350ps A2 CTL Skew = Delay 100ps, FSB Strap = 400FSB

Module #3 seems to be the tricky one again falling short of 1000Mhz 8-8-8-24 and requiring a bit more in terms of Skew tweaking needing CTL Skew Delay 100ps from 970-990mhz. Although in terms #3 module handled tighter sub timings for tRTR_S/RTR_D and tWTW_S/WTW_D than module #1 where up to 960mhz it was like module #2.

Granted this kit wasn't validated on X48 chipset and is meant for triple channel, so guess we shall see how the entire kit performs on Core i7/X58 platform later on

Update: For dual channel it seems module #1 is best in A2 Dimm slot and #2 would be best candidate for B2 Dimm slot, so tested module #2 in B2 Dimm slot and surprised by the result of how it handled tighter tRTR_S/RTR_D and tWTW_S/WTW_D timings (default 4/7 and 4/7 respectively) all the way up to 980Mhz 8-8-8-24!

Module #2 in B2 dimm slot
  • 920mhz 5951MB/s PASSED - 1.65681v vdimm, 1.55v NB
  • 930mhz 6016MB/s PASSED - 1.65681v vdimm, 1.55v NB
  • 940mhz 6080MB/s PASSED - 1.65681v vdimm, 1.55v NB
  • 950mhz 6145MB/s FAILED 1PE2 - 1.65681v vdimm, 1.57722v NB
  • 950mhz 6145MB/s FAILED 1PE12 - 1.65681v vdimm, 1.57722v NB, B2 CLK = Advance 200ps
  • 950mhz 6145MB/s FAILED 1PE12 - 1.65681v vdimm, 1.57722v NB, B2 CLK = Advance 25ps
  • 950mhz 6145MB/s PASSED - 1.65681v vdimm, 1.57722v NB, B2 CLK = Delay 100ps
  • 960mhz 6210MB/s PASSED - 1.65681v vdimm, 1.57722v NB, B2 CLK = Delay 100ps
  • 970mhz 6275MB/s PASSED - 1.65681v vdimm, 1.57722v NB, B2 CLK = Delay 100ps
  • 980mhz 6339MB/s PASSED - 1.67006v vdimm, 1.57722v NB, B2 CLK = Delay 100ps
  • 990mhz 6404MB/s FAILED 1PE4 - 1.67006v vdimm, 1.57722v NB, NB DDRVREF -10.0mv, B2 CLK = Delay 100ps
  • 1000mhz 5790MB/s PASSED tRTR_S/RTR_D 5/8 tWTW_S/WTW_D 5/8 - 1.67006v vdimm, 1.57722v NB, NB DDRVREF -10.0mv, B2 Clk Skew = Delay 100ps

System:
  • E3110 Q750A158
  • OCZ Vendetta 2 Air
  • Asus Rampage Extreme 1104 bios
  • 128MB Gainward FX5200 PCI
  • 3x 2GB Kingston HyperX T1 DDR3-2000Mhz CAS8 Triple Channel kit (KHX16000D3ULT1K3/6GX)
  • 1TB Samsung SATAII
  • Pioneer 216 DVD-RW
  • 1KW PCP Cooling SLI
  • WinXP Pro SP3 nLite fully updated

Last edited by eva2000; 28-06-2009 at 08:13 PM.
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