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[] Intel Displays Larrabee Wafer at IDF Beijing - - different look at memory


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Old 11-04-2009, 03:30 AM   #1
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[] Intel Displays Larrabee Wafer at IDF Beijing

Earlier this week, Intel conducted the Intel Developer Forum (IDF): Spring 2009 event at Beijing, China. Among several presentations on the the architectural advancements of the company's products, that include Nehalem and its scalable platforms, perhaps the most interesting was a brief talk by Pat Gelsinger, Senior Vice President and General Manager of Intel's Digital Enterprise Group, on Larrabee. The term is Intel's first "many cores" architecture used to work as a graphics processor. The architecture will be thoroughly backed by low-level and high-level programming languages and tools by Intel.

French website took a timely snap off a webcast of the event, showing Gelsinger holding a 300 mm wafer of Larrabee dice. The theory that Intel has working prototypes of the GPU deep inside its labs gains weight. Making use of current-generation manufacturing technologies, Intel is scaling the performance of x86 processing elements, all 32+ of them. As you can faintly see from the wafer, Larrabee has a large die. It is reported that first generation of Larrabee will be built on the 45 nm manufacturing process. Products based on the architecture may arrive by late 2009, or early 2010. With the company kicking off its 32 nm production later this year, Larrabee may be built on the newer process a little later.


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