Corsair TW3X2G2133C9DF Dominator + DFI UT X48-T3RS
This is a discussion on Corsair TW3X2G2133C9DF Dominator + DFI UT X48-T3RS within the DDR3 Intel Memory forums, part of the Intel memory category; Corsair folks were kind enough to send me a set of their flag ship DDR3 kits, 2GB Corsair TW3X2G2133C9DF Dominator ...
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14-09-2008, 02:12 AM
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| Administrator |  Corsair TW3X2G2133C9DF Dominator + DFI UT X48-T3RS
Corsair folks were kind enough to send me a set of their flag ship DDR3 kits, 2GB Corsair TW3X2G2133C9DF Dominator dual channel memory rated for 9-9-9-24 at 2.0v. These are apparently based on Samsung ICs. The memory packaging seems to be dated week 31, 2008 while the SPD according to Everest Ultimate 4.60 reports week 19, 2008.     I decided to start off with DFI UT X48-T3RS with newly first time flashed 8/29 official bios, along with swapping in a new E8600 Q820A599 which has never been tested on this motherboard before. I kept the 2x 512MB HIS IceQ3 Turbo HD3850 Crossfire video cards in place but updated from Cat 8.7 to 8.8 drivers. So it's new video card drivers, new bios, new cpu and new memory first look so to speak  System specs
Unfortunately, max fsb on DFI UT X48-T3RS is still stuck around 500-510FSB. So no way to hit the rated memory speeds for this 2x1GB Corsair TW3X2G2133C9DF Dominator kit. I'll be trying the memory on other motherboards later. For now some quick tests at DDR3-2000 9-9-9-24 1T at 1.874v bios set and DDR3-2000 8-8-8-21 1T at 1.915v. DDR3-2000 9-9-9-24 1T at 1.874v bios set CPUZ Validation  Super Pi 1M = 11.515s & Super Pi 32M = 11m 27.688s   Hyper Pi dual 32M  3Dmark06 @810/1000  DFI LP UT X48-T3RS Bios Settings 8/29 official bios Code: PC Health Status Adjust CPU Temp: -6C CPU Feature - Thermal Management Control: Disabled - PPM(EIST) Mode: Disabled - Limit CPUID MaxVal: Disabled - CIE Function: Disabled - Virtualization Technology: Disabled - Core Multi-Processing: Enabled Exist Setup Shutdown: Mode 2 Shutdown after AC Loss: Disabled O.C. Fail retry Counter 0 CPU Clock Ratio: 8x CPU N/2 Ratio: Disabled Target CPU Clock: CPU Clock: 500 Boot Up Clock: AUTO CPU Clock Amplitude: 800mv CPU Clock0 Skew: 0ps CPU Clock1 Skew: 0ps DRAM Speed: 400/1600 - Target DRAM Speed: DDR3-1000 PCIE Clock: 100mhz PCIE Slot Config: 1X 1X CPU Spread Spectrum: Disabled PCIE Spread Spectrum: Disabled SATA Spread Spectrum: Disabled Voltage Settings CPU VID Control: 1.18750v COY VID Special Add Limit: Enabled CPU VID Special Add: AUT0 DRAM Voltage Control: 1.874v SB Core/CPU PLL Voltage: 1.51 NB Core Voltage: 1.566 CPU VTT Voltage: 1.300 Vcore Droop Control: Enabled Clockgen Voltage Control: 3.45v GTL+ Buffers Strength: Strong Host Slew Rate: Weak x MCH RON Offset Value: x MCH RTT Offset Value: x MCH Slew Rate Offset Value: x MCH VREF 1 Value: x MCH VREF 2 Value: x MCH VREF 3 Value: GTL REF Voltage Control: Disable x CPU GTL 1/2 REF Volt: 113 x CPU GTL 0/3 REF Volt: 100 x North Bridge GTL REF Volt: 100 DRAM Timing - DRAM CLK Driving Strength: Level 6 - DRAM DATA Driving Strength: Level 8 - Ch1 DLL Default Skew Model: Model 1 - Ch2 DLL Default Skew Model: Model 1 - Enhance Data transmitting: AUTO - Enhance Addressing: FAST - T2 Dispatch: Enabled Fine Delay Step Degree: 5ps to 80ps Clock Setting Fine Delay Ch1 Clock Crossing Setting: Aggressive - DIMM 1 Clock fine delay: Current 329ps - DIMM 2 Clock fine delay: Curren 329ps - DIMM 2 Control fine delay: Current 294ps - DIMM 1 Control fine delay: Current 259ps - Ch 1 Command fine delay: Current 273ps Ch2 Clock Crossing Setting: Aggressive - DIMM 3 Clock fine delay: Current 469ps - DIMM 4 Clock fine delay: Current 469ps - DIMM 4 Control fine delay: Current 406ps - DIMM 3 Control fine delay: Current 322ps - Ch 2 Command fine delay: Current 329ps Ch1Ch2 CommonClock Setting: Aggressive Ch1 RDCAS GNT-Chip Delay: Auto Ch1 WRCAS GNT-Chip Delay: Auto Ch1 Command to CS Delay: Auto Ch2 RDCAS GNT-Chip Delay: Auto Ch2 WRCAS GNT-Chip Delay: Auto Ch2 Command to CS Delay: Auto Common CMD to CS Timing: 1N CAS Latency Time (tCL): 9 RAS# to CAS# Delay (tRCD): 9 RAS# Precharge (tRP): 9 Precharge Delay (tRAS): 24 All Precharge to Act: AUTO REF to ACT Delay (tRFC): AUTO Performance LVL (Read Delay) (tRD): AUTO Read delay phase adjust: Enter Ch1 Read delay phase (4~0) - Channel 1 Phase 0 Pull-In: AUTO - Channel 1 Phase 1 Pull-In: AUTO - Channel 1 Phase 2 Pull-In: AUTO - Channel 1 Phase 3 Pull-In: AUTO - Channel 1 Phase 4 Pull-In: AUTO Ch2 Read delay phase (4~0) - Channel 2 Phase 0 Pull-In: Auto - Channel 2 Phase 1 Pull-In: Auto - Channel 2 Phase 2 Pull-In: Auto - Channel 2 Phase 3 Pull-In: Auto - Channel 2 Phase 4 Pull-In: Auto MCH ODT Latency: AUTO Write to PRE Delay (tWR): AUTO Rank Write to Read (tWTR): AUTO ACT to ACT Delay (tRRD): AUTO Read to Write Delay (tRDWR): AUTO Ranks Write to Write (tWRWR): AUTO Ranks Read to Read (tRDRD): AUTO Ranks Write to Read (tWRRD): AUTO Read CAS# Precharge (tRTP): AUTO ALL PRE to Refresh: AUTO XMP Support: Disabled |
| Last edited by eva2000; 14-09-2008 at 10:45 PM. | |
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14-09-2008, 02:13 AM
| #2 (permalink) |
| Administrator | DDR3-2000 8-8-8-21 1T at 1.915v bios set CPUZ Validation  Super Pi 1M = 11.484s & Super Pi 32M = 11m 21.172s   Hyper Pi dual 32M  3Dmark06 @810/1000  DFI LP UT X48-T3RS Bios Settings 8/29 official bios Code: PC Health Status Adjust CPU Temp: -6C CPU Feature - Thermal Management Control: Disabled - PPM(EIST) Mode: Disabled - Limit CPUID MaxVal: Disabled - CIE Function: Disabled - Virtualization Technology: Disabled - Core Multi-Processing: Enabled Exist Setup Shutdown: Mode 2 Shutdown after AC Loss: Disabled O.C. Fail retry Counter 0 CPU Clock Ratio: 8x CPU N/2 Ratio: Disabled Target CPU Clock: CPU Clock: 500 Boot Up Clock: AUTO CPU Clock Amplitude: 800mv CPU Clock0 Skew: 0ps CPU Clock1 Skew: 0ps DRAM Speed: 400/1600 - Target DRAM Speed: DDR3-1000 PCIE Clock: 100mhz PCIE Slot Config: 1X 1X CPU Spread Spectrum: Disabled PCIE Spread Spectrum: Disabled SATA Spread Spectrum: Disabled Voltage Settings CPU VID Control: 1.18750v COY VID Special Add Limit: Enabled CPU VID Special Add: AUT0 DRAM Voltage Control: 1.915v SB Core/CPU PLL Voltage: 1.51 NB Core Voltage: 1.566 CPU VTT Voltage: 1.300 Vcore Droop Control: Enabled Clockgen Voltage Control: 3.45v GTL+ Buffers Strength: Strong Host Slew Rate: Weak x MCH RON Offset Value: x MCH RTT Offset Value: x MCH Slew Rate Offset Value: x MCH VREF 1 Value: x MCH VREF 2 Value: x MCH VREF 3 Value: GTL REF Voltage Control: Disable x CPU GTL 1/2 REF Volt: 113 x CPU GTL 0/3 REF Volt: 100 x North Bridge GTL REF Volt: 100 DRAM Timing - DRAM CLK Driving Strength: Level 6 - DRAM DATA Driving Strength: Level 8 - Ch1 DLL Default Skew Model: Model 1 - Ch2 DLL Default Skew Model: Model 1 - Enhance Data transmitting: AUTO - Enhance Addressing: FAST - T2 Dispatch: Enabled Fine Delay Step Degree: 5ps to 80ps Clock Setting Fine Delay Ch1 Clock Crossing Setting: Aggressive - DIMM 1 Clock fine delay: Current 329ps - DIMM 2 Clock fine delay: Curren 329ps - DIMM 2 Control fine delay: Current 294ps - DIMM 1 Control fine delay: Current 259ps - Ch 1 Command fine delay: Current 273ps Ch2 Clock Crossing Setting: Aggressive - DIMM 3 Clock fine delay: Current 469ps - DIMM 4 Clock fine delay: Current 469ps - DIMM 4 Control fine delay: Current 406ps - DIMM 3 Control fine delay: Current 322ps - Ch 2 Command fine delay: Current 329ps Ch1Ch2 CommonClock Setting: Aggressive Ch1 RDCAS GNT-Chip Delay: Auto Ch1 WRCAS GNT-Chip Delay: Auto Ch1 Command to CS Delay: Auto Ch2 RDCAS GNT-Chip Delay: Auto Ch2 WRCAS GNT-Chip Delay: Auto Ch2 Command to CS Delay: Auto Common CMD to CS Timing: 1N CAS Latency Time (tCL): 8 RAS# to CAS# Delay (tRCD): 8 RAS# Precharge (tRP): 8 Precharge Delay (tRAS): 21 All Precharge to Act: AUTO REF to ACT Delay (tRFC): AUTO Performance LVL (Read Delay) (tRD): AUTO Read delay phase adjust: Enter Ch1 Read delay phase (4~0) - Channel 1 Phase 0 Pull-In: AUTO - Channel 1 Phase 1 Pull-In: AUTO - Channel 1 Phase 2 Pull-In: AUTO - Channel 1 Phase 3 Pull-In: AUTO - Channel 1 Phase 4 Pull-In: AUTO Ch2 Read delay phase (4~0) - Channel 2 Phase 0 Pull-In: Auto - Channel 2 Phase 1 Pull-In: Auto - Channel 2 Phase 2 Pull-In: Auto - Channel 2 Phase 3 Pull-In: Auto - Channel 2 Phase 4 Pull-In: Auto MCH ODT Latency: AUTO Write to PRE Delay (tWR): AUTO Rank Write to Read (tWTR): AUTO ACT to ACT Delay (tRRD): AUTO Read to Write Delay (tRDWR): AUTO Ranks Write to Write (tWRWR): AUTO Ranks Read to Read (tRDRD): AUTO Ranks Write to Read (tWRRD): AUTO Read CAS# Precharge (tRTP): AUTO ALL PRE to Refresh: AUTO XMP Support: Disabled |
| Last edited by eva2000; 14-09-2008 at 10:45 PM. | |
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14-09-2008, 02:13 AM
| #3 (permalink) |
| Administrator | DDR3-1820 7-7-7-24 2T at 2.00v bios set Trying tighter CAS7 timings, it seems Samsung ICs don't have the same mileage as Micron D9GTR/GTS/JNM needing around 0.1v to 0.18v more vdimm to hit DDR3-1800 7-7-7-x. But could be I haven't had much time to tweak and tune with the new cpu, bios and memory so far. I've managed to tune it somewhat by changing DRAM Default skew models from 1 to 6 and dropping DRAM CLK Driving Strength one level from 6 to 5. 2T was slightly more stable than 1T although mem clock ceiling was about the same. Super Pi 32M = 11m 51.656  Hyper Pi dual 32M  3Dmark06 @810/1000  DFI LP UT X48-T3RS Bios Settings 8/29 official bios Code: PC Health Status Adjust CPU Temp: -6C CPU Feature - Thermal Management Control: Disabled - PPM(EIST) Mode: Disabled - Limit CPUID MaxVal: Disabled - CIE Function: Disabled - Virtualization Technology: Disabled - Core Multi-Processing: Enabled Exist Setup Shutdown: Mode 2 Shutdown after AC Loss: Disabled O.C. Fail retry Counter 0 CPU Clock Ratio: 8x CPU N/2 Ratio: Disabled Target CPU Clock: CPU Clock: 455 Boot Up Clock: AUTO CPU Clock Amplitude: 800mv CPU Clock0 Skew: 0ps CPU Clock1 Skew: 0ps DRAM Speed: 400/1600 - Target DRAM Speed: DDR3-1000 PCIE Clock: 100mhz PCIE Slot Config: 1X 1X CPU Spread Spectrum: Disabled PCIE Spread Spectrum: Disabled SATA Spread Spectrum: Disabled Voltage Settings CPU VID Control: 1.18750v COY VID Special Add Limit: Enabled CPU VID Special Add: AUT0 DRAM Voltage Control: 2.000 SB Core/CPU PLL Voltage: 1.51 NB Core Voltage: 1.655 CPU VTT Voltage: 1.300 Vcore Droop Control: Enabled Clockgen Voltage Control: 3.45v GTL+ Buffers Strength: Strong Host Slew Rate: Weak x MCH RON Offset Value: x MCH RTT Offset Value: x MCH Slew Rate Offset Value: x MCH VREF 1 Value: x MCH VREF 2 Value: x MCH VREF 3 Value: GTL REF Voltage Control: Disable x CPU GTL 1/2 REF Volt: 113 x CPU GTL 0/3 REF Volt: 100 x North Bridge GTL REF Volt: 100 DRAM Timing - DRAM CLK Driving Strength: Level 5 - DRAM DATA Driving Strength: Level 8 - Ch1 DLL Default Skew Model: Model 6 - Ch2 DLL Default Skew Model: Model 6 - Enhance Data transmitting: AUTO - Enhance Addressing: FAST - T2 Dispatch: Enabled Fine Delay Step Degree: 5ps to 80ps Clock Setting Fine Delay Ch1 Clock Crossing Setting: Auto - DIMM 1 Clock fine delay: Current 49ps - DIMM 2 Clock fine delay: Curren 49ps - DIMM 2 Control fine delay: Current 7ps - DIMM 1 Control fine delay: Current 595ps - Ch 1 Command fine delay: Current 616ps Ch2 Clock Crossing Setting: Auto - DIMM 3 Clock fine delay: Current 182ps - DIMM 4 Clock fine delay: Current 182ps - DIMM 4 Control fine delay: Current 120ps - DIMM 3 Control fine delay: Current 35ps - Ch 2 Command fine delay: Current 42s Ch1Ch2 CommonClock Setting: Auto Ch1 RDCAS GNT-Chip Delay: Auto Ch1 WRCAS GNT-Chip Delay: Auto Ch1 Command to CS Delay: Auto Ch2 RDCAS GNT-Chip Delay: Auto Ch2 WRCAS GNT-Chip Delay: Auto Ch2 Command to CS Delay: Auto Common CMD to CS Timing: 1N CAS Latency Time (tCL): 7 RAS# to CAS# Delay (tRCD): 7 RAS# Precharge (tRP): 7 Precharge Delay (tRAS): 24 All Precharge to Act: AUTO REF to ACT Delay (tRFC): AUTO Performance LVL (Read Delay) (tRD): AUTO Read delay phase adjust: Enter Ch1 Read delay phase (4~0) - Channel 1 Phase 0 Pull-In: AUTO - Channel 1 Phase 1 Pull-In: AUTO - Channel 1 Phase 2 Pull-In: AUTO - Channel 1 Phase 3 Pull-In: AUTO - Channel 1 Phase 4 Pull-In: AUTO Ch2 Read delay phase (4~0) - Channel 2 Phase 0 Pull-In: Auto - Channel 2 Phase 1 Pull-In: Auto - Channel 2 Phase 2 Pull-In: Auto - Channel 2 Phase 3 Pull-In: Auto - Channel 2 Phase 4 Pull-In: Auto MCH ODT Latency: AUTO Write to PRE Delay (tWR): AUTO Rank Write to Read (tWTR): AUTO ACT to ACT Delay (tRRD): AUTO Read to Write Delay (tRDWR): AUTO Ranks Write to Write (tWRWR): AUTO Ranks Read to Read (tRDRD): AUTO Ranks Write to Read (tWRRD): AUTO Read CAS# Precharge (tRTP): AUTO ALL PRE to Refresh: AUTO XMP Support: Disabled |
| Last edited by eva2000; 14-09-2008 at 10:54 PM. | |
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14-09-2008, 02:13 AM
| #4 (permalink) |
| Administrator | E8600 Q820A599 *0537 @4.9Ghz H20 benchmarks I swapped from my E8600 Q820A599 *5146 cpu to my E8600 Q820A599 *0537 cpu in hopes of having a better max FSB on this DFI UT X48-T3RS, unfortunately board still has me stuck down around 500-510FSB. So decided to have a play at 3dmark which I haven't done in a while - more a cpu test than memory System specs
There's around 0.016v to 0.032v vcore droop under load and according to Powermate wattage metter, peak system power draw under load was ~446 watts
 3Dmark @810/2000     AM3 @825/2000 click screenshot for larger image  Super Pi 32M click screenshot for larger image  |
| Last edited by eva2000; 18-09-2008 at 09:47 PM. | |
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14-09-2008, 02:13 AM
| #5 (permalink) |
| Administrator | E8600 Q820A599 @4980Mhz H20 Managed to squeeze out alot more cpu mhz with this DFI UT X48-T3RS on tiny Corsair Nautilus 500 H20, than I did with Gigabyte EP45 Extreme on Dtek Fuzion WB + Thermochill HE120.3 H20! 3Dmark05 nearly pulled off 5000Mhz at 1.55v bios set but rebooted near the end of the run  So for 3Dmark05 managed 4980Mhz at 1.55v bios set to reclaim my HD3850CF hwbot #4 rank hardware category spot  Also with AM3 of 284,100 and 3dmark2001 run @4900Mhz with 825/2000 on GPUs for 90,336 managed to reclaim #4 rank hardware category spots for HD3850CF as well 3Dmark05 = 32,230 3D2001 = 90,336 AM3 = 284,100 click image for full screenshot   |
| Last edited by eva2000; 18-09-2008 at 09:47 PM. | |
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14-09-2008, 02:13 AM
| #6 (permalink) |
| Administrator | E8600 Q820A599 @5003-5146Mhz Bumped up vcore to 1.575v bios which came in around 1.568-1.584v idle with 0.016v-0.032v droop. This allowed to me pull of 32M @5003Mhz, 1M @5075Mhz and CPUZ Validation @5186Mhz (but cvf file didn't work so 5146Mhz screenie). 32M @5003Mhz = 9m 29.812s 1M @5075Mhz = 9.078s   CPUZ Validation @DDR3-2058 Probably limited a bit by FSB ceiling as well as cpu cooling   3dmark2001 didn't want to complete at 4980-5000Mhz so had to drop down to 4950Mhz with HD3850CF @823/2000  System specs
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| Last edited by eva2000; 18-09-2008 at 10:01 PM. | |
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15-09-2008, 10:24 PM
| #7 (permalink) |
| Administrator | E8600 Q820A599 *0537 @4.9Ghz H20 benchmarks I swapped from my E8600 Q820A599 *5146 cpu to my E8600 Q820A599 *0537 cpu in hopes of having a better max FSB on this DFI UT X48-T3RS, unfortunately board still has me stuck down around 500-510FSB. So decided to have a play at 3dmark which I haven't done in a while - more a cpu test than memory System specs
There's around 0.016v to 0.032v vcore droop under load and according to Powermate wattage metter, peak system power draw under load was ~446 watts
3Dmark @810/2000 AM3 @825/2000 click screenshot for larger image Super Pi 32M click screenshot for larger image |
| Last edited by eva2000; 15-09-2008 at 10:52 PM. | |
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16-09-2008, 12:41 AM
| #8 (permalink) |
| Administrator | E8600 Q820A599 @4980Mhz H20 Managed to squeeze out alot more cpu mhz with this DFI UT X48-T3RS on tiny Corsair Nautilus 500 H20, than I did with Gigabyte EP45 Extreme on Dtek Fuzion WB + Thermochill HE120.3 H20! 3Dmark05 nearly pulled off 5000Mhz at 1.55v bios set but rebooted near the end of the run So for 3Dmark05 managed 4980Mhz at 1.55v bios set to reclaim my HD3850CF hwbot #4 rank hardware category spot Also with AM3 of 284,100 and 3dmark2001 run @4900Mhz with 825/2000 on GPUs for 90,336 managed to reclaim #4 rank hardware category spots for HD3850CF as well 3Dmark05 = 32,230 3D2001 = 90,336 AM3 = 284,100 click image for full screenshot |
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