6x1GB Corsair + GSkill + Cellshock (HCF0 + D9GTR) CAS8 overclocks!
This is a discussion on 6x1GB Corsair + GSkill + Cellshock (HCF0 + D9GTR) CAS8 overclocks! within the DDR3 Intel Memory forums, part of the Intel memory category; First time mismatched 6x1GB triple channel. Still manages to accomodate my push 120x38mm thick Scythe UltraKaze 2000rpm fan with memory ...
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First time mismatched 6x1GB triple channel. Still manages to accomodate my push 120x38mm thick Scythe UltraKaze 2000rpm fan with memory module installed in dimm slot 1 ![]() System specs
Memory configuration:
![]() ![]() Seems with 6x1GB AUTO CMD rate = 2T, so for 1T you need to change CMD rate from AUTO to 1T (1N). Bumped vdimm straight to 1.830v in bios and clocked 6x1GB straight up to DDR3-1606Mhz 8-8-8-24 1T to see how it runs. Everest latency speeds seem to get slower as you add more modules. So in terms of fastest everest latency the order goes = 2x1GB > 3x1GB > 6x1GB. Still 32M time with 6x1GB DDR3-1606Mhz 8-8-8-24 1T is pretty decent. 6x1GB @DDR3-1606Mhz 8-8-8-24 1T at 1.830v bios (DMM measured 1.835v real) ![]() ![]() ![]() |
| Last edited by eva2000; 29-01-2009 at 06:14 PM. | |
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| Administrator | 6x1GB @DDR3-1688Mhz 8-8-8-24 1T at 1.815v bios (DMM measured 1.820v real) Bumped Bclk to 211 and reduced vdimm from 1.830v bios to 1.815v bios (DMM = 1.820v real) for DDR3-1688Mhz 8-8-8-24 1T. ![]() ![]() Slightly faster 32M Pi times than 3x1GB D9GTR at same main timings even though below 6x1GB was done with considerably looser subtimings for tRFC, tWTP, tRRD and tFAW in bios. Will try tighter timings later. ![]() Everest SPD and bandwidth ![]() ![]() ![]() LinX 10 passes ![]() Best I can do keeping voltages the same @879Mhz 8-8-8-24 1T at 1.815v bios (1.820v real) |
| Last edited by eva2000; 29-01-2009 at 05:48 PM. | |
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| Administrator | 6x1GB 7-7-7-18 1T Seems this mismatched combo does pretty well tightening both main and subtimings managing up to DDR3-1718Mhz 7-7-7-18 1T at 1.875v bios. Needed a notch or two higher vdimm when subtimings were tightened otherwise I could of lowered vdimm by ~0.25-0.30v. System specs
Memory configuration:
Super Pi 32M stable
DDR3-1606Mhz 7-7-7-18 1T 1.740v bios (1.745v DMM) ![]() DDR3-1702Mhz 7-7-7-18 1T 1.830v bios (1.835v DMM) ![]() DDR3-1718Mhz 7-7-7-18 1T 1.875v bios (1.880v DMM) ![]() ![]() ![]() |
| Last edited by eva2000; 30-01-2009 at 06:43 PM. | |
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| Administrator | Max 6x1GB 8-8-8-24 1T Clocks Changing to 10x memory multiplier, tried to find max 6x1GB 8-8-8-24 1T clocks and ended up with DDR3-2000Mhz 8-8-8-24 1T at 2.04v bios (2.045v real) only for tried 1M Super Pi as 32M Pi test failed. I dropped bclk and mem clocks to DDR3-1960Mhz 8-8-8-24 1T at same vdimm but Super Pi 32M failed at 22nd iteration. Similar trend occured at DDR3-1940mhz as well. I recall it's probably the Cellshock PC3-14400 Micron D9GTR holding the 6x1GB modules back as it needed more vdimm for do such clocks even on P35/X48 DDR3 boards closer to 2.1+ volts for around DDR3-1920 8-8-8-x. Decided to stop there as unnecessary stress to i7 IMC ain't needed when I shall have some nice DDR3-2000 CAS7 rated triple channel memory due my way this coming week ![]() System specs
Memory configuration:
6x1GB Samsung HCF0 + Micron D9GTR @8-8-8-24 1T at 2.04v bios (2.045v DMM real) ![]() ![]() Super Pi 1M = 10.140s ![]() Super Pi 32M failed at 22nd loop @DDR3-1960Mhz 8-8-8-24 1T |
| Last edited by eva2000; 01-02-2009 at 05:03 PM. | |
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| cellshock, corsair, ddr3, dfi x58, gskill, i7 920, micron d9gtr, samsung hcf0 |
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