3x2GB Kingston HyperX T1 2000CAS8 - Elpida 50mm Hyper - X48 DDR3 tests
This is a discussion on 3x2GB Kingston HyperX T1 2000CAS8 - Elpida 50mm Hyper - X48 DDR3 tests within the DDR3 Intel Memory forums, part of the Intel memory category; Lots of folks have reported the new Elpida 50mm Hyper IC modules used for the high end triple channel memory ...
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Lots of folks have reported the new Elpida 50mm Hyper IC modules used for the high end triple channel memory kits fairs pretty well for overclocking on X48 DDR3 platform. So decided to check it out with my 3x2GB Kingston HyperX T1 DDR3-2000Mhz CAS8 Triple Channel kit (KHX16000D3ULT1K3/6GX) on Asus Rampage Extreme as my DFI UT X58-T3EH8 is occupied for other tests. ![]() ![]() System:
Lots of folks have reported 3x2GB Kingston HyperX T1 DDR3-2000Mhz CAS8 Triple Channel kits having a module failure or a poor module within their 3x2GB kit on X58 platform. So I decided to kill 2 birds with 1 stone so to speak. I will test each 2GB module individually on Rampage Extreme's optimal dimm slots A2+B2. Each 2GB module will be tested on A2 and then B2 dimm slots using quick Memtest86+ v2.11 loop test #5 for 10 passes minimum. Not a stressful test but enough to weed out which 2GB modules are the better of the 3 modules to be paired for dual channel 2x2GB operation on Rampage Extreme. I used a bit of masking tape to label each 2GB module - #1, #2 and #3 modules respectively. Results Results for 8.5x cpu multiplier and main 8-8-8-24 timings on 266FSB Strap 1:2 divider. At certain frequency subtimings for tRTR_S/RTR_D and tWTW_S/WTW_D had to be reduced to 5/9 for each pair for read to read same and different ranks and write to write same and different ranks respectively to pass test #5 loop. This reduced memtest reported bandwidth by ~10.5%. Still great once you factor in dual channel bandwidth will be higher. i.e. at 950mhz and 960mhz respectively bandwidth dropped from AUTO subtimings to manually set to above from 6145MB/s to 5500MB/s and 6210MB/s to 5558MB/s. With looser subtimings for at:
Module #1 in A2 dimm slot
Module #2 in A2 dimm slot
Module #3 in A2 and B2 dimm slot
Module #3 cut short my tests for B2 dimm slot testing, so will do that later with module #1 and #2 in B2 and update this post with the results later on. Conclusion: As you can see module #1 didn't fair that well compared to module #2. At 950mhz it already required the 4 mentioned subtimings to be loosened at least 10mhz earlier/lower than when module #2 needed to touch those subtimings. Module #2 continued to scale all the way to 990Mhz at same vdimm voltage until 1000Mhz which needed vdimm bump from 1.72306v to 1.74956v. I didn't apply much more vdimm over that for 2GB single module testing so as to leave room for when dual channel is tested which will require more vdimm usually. Module #3 on the other hand was a complete dud which I'd deem faulty by any definition ![]() As you can see there are differences amongst the 3x 2GB modules even on X48. Will these differences translate over on X58 in triple channel mode ? Are these differences one explanation as to reason some folks reporting these 3x2GB Kingston HyperX T1 2000 CAS8 kits have one module failing or not hitting rated speeds ?? Module #3 was a disappointment and could be reason why on DFI UT X58-T3EH8 i got 4GB detected out of 6GB in a few different module/dimm slot combinations. If the modules were placed in a certain dimm slot configuration, all 6GB was detected at DDR3-2000Mhz 8-8-8-24 on DFI UT X58-T3EH8. Same with certain CPU VTT and VDIMM combinations 6GB was detected instead of 2GB or 4GB (memory tip #6). But didn't test this kit much as Corsair Dominator GT kit was busy on DFI UT X58-T3EH8. I'd say worth looking into testing each module individually if you are having 3x2GB issues on X58 platform as well. Of course module #3 would be deemed faulty for not running rated timings at least 8-8-8-24 for lowly DDR3-1066mhz to DDR3-1333Mhz underclock!. |
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Yeah very unfortunate as I really was hoping #3 would be matching #2 for 1000mhz possibilities in dual channel ![]() Interesting starting dual channel with module #1 (B2) + #2 (A2 banks) and at DDR3-1600 8-8-8-24 already memtest reports 5,878MB bandwidth but dozen or so test #5 errors but loosening the 4 above sub timings help reduced the errors somewhat so far to 1 or 2 errors per pass.
Seems advancing skews for both A2/B2 CLK Skew to 150ps and 200ps respectively along with 8-9-8-9 for subtimings and NB DDRVREF at -17.5mv have me error free looping test #5 (each pass for 2x2GB config takes 130 seconds to complete) - did 10 pass loop without errors. Huge difference to 1000s of errors without CLK skew tweaking! Memtest reported bandwidth still at 5,691MB/s ! Starting tests at DDR3-1700Mhz 8-8-8-24 and error free so far.. without touching any voltages for memory or NB yet! |
| Last edited by eva2000; 09-06-2009 at 04:46 AM. | |
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2x2GB Kingston HyperX T1 2000CAS8 Elpida 50mm Hyper modules pretty hard to find stable points even for just HyperPi dual 32M run. So far with skew and other voltage tweaks set, managed to pull off DDR3-1820Mhz 8-8-8-24 AUTO CMD rate is apparently 2T at 1.723v vdimm. ![]() BIOS : 1104 Code: Ai Overclock Tuner : Manual Oc From Cpu Levet Up : Auto Oc From Memory Level Up : Auto FSB Frequency : 455 CPU ratio sitting : 8.5 CPU configuration : --------------------------- : C1E support : disabled Cpu TM function : disabled Max CPUID value limit : disabled Vanderpool technology : disabled Execute disable bit : disabled Core multi-processing : enabled * CPU clock skew : Auto * NB clok skew : Auto FSB Strap to North Bridge : 266FSB PCIE Frequency : 103 DRAM Frequency : DDR3-1823mhz DRAM Command Rate : AUTO DRAM Timing Control : Manual 1ST INFORMATION CAS# latency : : 8 RAS# to CAS# delay : : 8 RAS# PRE time : 8 RAS# ACT time : 24 RAS# to RAS# delay : AUTO REF cycle time : AUTO WRITE recovery time : AUTO READ to PRE time : AUTO 2ND INFORMATION READ to WRITE delay(S/D) : AUTO WRITE to READ delay(S) : AUTO WRITE to READ delay(D) : AUTO READ to READ delay(S) : 9 READ to READ delay(D) : 11 WRITE to WRITE delay(S) : 9 WRITE to WRITE delay(D) : 11 3RD INFORMATION WRITE to PRE delay : AUTO READ to PRE delay : AUTO PRE to PRE delay : AUTO ALL PRE to ACT delay : AUTO ALL PRE to REF delay : AUTO DRAM Static Read Control : disabled or AUTO DRAM Dynamic Write Control : disabled or AUTO DRAM Skew Control : ------------------------------ : DRAM CMD skew on channel A : auto DRAM CLK skew on DIMM A1 : auto DRAM CLK skew on DIMM A2 : advance 300ps DRAM CTL skew on DIMM A1 : auto DRAM CLT skew on DIMM A2 : delay 100ps DRAM CMD skew on channel B : auto DRAM CLK skew on DIMM B1 : auto DRAM CLK skew on DIMM B2 : advance 250ps DRAM CTL skew on DIMM B1 : auto DRAM CTL skew on DIMM B2 : auto Ai Clock Twister: AUTO Ai Transaction Booster: AUTO / -- Manual -- = AUTO Common Performance Level : 08 Pull-in of CHA PH1 : disabled : Pull in of CHA PH2 : disabled : Pull in of CHB PH1 : disabled : Pull in of CHB PH2 : disabled : -- Manual -- EPU II phase control : auto or full phase CPU Voltage : 1.28750v Load-line calibration : Disabled CPU PLL voltage : 1.56406v FSB termination voltage : 1.28566v CPU GTLVref(0) : auto CPU GTLVref(1) : auto CPU GTLVref(2) : auto CPU GTLVref(3) : auto NB GTLVref : auto North bridge voltage : 1.59656v DRAM voltage : 1.72362v NB DDRVref : -17.5mv DDR3 channel A Vref : -02.5mv DDR3 channel B Vref : auto South bridge 1.5 voltage : 1.56406v South bridge 1.05 voltage : 1.06039v CPU spread spectrum : disabled PCIE spread spectrum : disabled Memory Remap Feature: Enabled |
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| Administrator | RMA Replacement Individual 2GB Kingston 2000C8 Tests Clearly, you can see that the replacement kit is much better and working very nicely for Vdimm required as well. Same Memtest86+ v2.11 test #5 10x loops with reported bandwidth and settings used. For initial tests trying to keep VDIMM as close to 1.65v rated volts first - the aim is to see how high I can clock the memory without errors at such VDIMM voltage. For failed passed, short hand 1PE38 = 1st pass 38 errors 8-8-8-24 timings CPU FSB = 1.27241v CPU PLL = SB = 1.53756v Module #1 in A2 dimm slot
Module #2 in A2 dimm slot
Module #3 in A2 dimm slot
Module #3 seems to be the tricky one again falling short of 1000Mhz 8-8-8-24 and requiring a bit more in terms of Skew tweaking needing CTL Skew Delay 100ps from 970-990mhz. Although in terms #3 module handled tighter sub timings for tRTR_S/RTR_D and tWTW_S/WTW_D than module #1 where up to 960mhz it was like module #2. Granted this kit wasn't validated on X48 chipset and is meant for triple channel, so guess we shall see how the entire kit performs on Core i7/X58 platform later on ![]() Update: For dual channel it seems module #1 is best in A2 Dimm slot and #2 would be best candidate for B2 Dimm slot, so tested module #2 in B2 Dimm slot and surprised by the result of how it handled tighter tRTR_S/RTR_D and tWTW_S/WTW_D timings (default 4/7 and 4/7 respectively) all the way up to 980Mhz 8-8-8-24! Module #2 in B2 dimm slot
System:
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| Last edited by eva2000; 28-06-2009 at 08:13 PM. | |
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