E8500 Q740A493T + DFI LP LT X38-T2R + Corsair Nautilus 500

eva2000 · 05-02-2008, 09:55 AM

While my E8500 Q740A493T 0909 cpu is still on Asus Commando, I'll test my E8500 Q740A493T 1808 cpu on DFI LP LT X38-T2R. I'm trying to find the best/max FSB capable motherboard for phase change cooling to best max out my E8500s for 3dmark benchmarking since these E8500 only have 9.5x cpu multipler and already on 1/4HP SS phase I've gotten my E8500 0909 to 5320Mhz cpuz validation and 5155Mhz for Super Pi 32M.

So testing out DFI LP LT X38-T2R:

System

Intel Core 2 Duo E8500 Q740A493T 2L7**** / **1808
CPU Cooling: Corsair Nautilus 500 H20
DFI LP LT X38-T2R 12/28 beta
128MB Gainward FX5200 PCI
2GB Crucial Ballistix Tracer PC2-8500 dual channel kit (green dimm slots)
750GB Samsung HD753LJ
Pioneer DVD-RW
700W OCZ GameXStream
WinXP Pro SP2

Room temp: 28.1C to 29.5C

4000Mhz - 9.5x421FSB at 1.2875v bios (1.312v windows load)

Asus Blitz Formula with Dtek Fuzion/Thermochill HE120.3/Alphacool AP1510 @15v
vs
DFI LP LT X38-T2R with Corsair Nautilus 500

As you can see the Dtek Fuzion H20 setup is much better at cooling cpu with 47C load at 33.8C max room temps versus Corsair Nautilus 500 at 57C load temps in much cooler 29.5C max room temps. Hence, the cpu on DFI X38 + Nautilus 500 setup needing slightly more vcore of 1.312v load instead of 1.304v load.

Dtek Fuzion cooling = 13.2C CPU load to Room max temp delta
vs
Corsair Nautilus 500 cooling = 27.5C CPU load to Room max temp delta

System

Intel Core 2 Duo E8500 Q740A493T 2L7**** / **1808
CPU Cooling: Dtek Fuzion Rad Tower Box (Thermochill HE120.3/Alphacool AP1510 @15v)
Asus Blitz Formula 1205 bios
128MB Gainward FX5200 PCI
2x1GB Crucial Ballistix Tracer PC2-8500 dual channel kit (white dimm slots)
Memory cooling: 120x25mm Thermaltake 81cfm fan
80GB Hitachi 7K80 SATAII
Pioneer DVD-RW
620W Corsair HX620 PSU supplied by Corsair
WinXP Pro SP2 Nlite Fully Updated.

Room temp: 30.4C to 33.8C

4000Mhz - 9.5x421FSB at 1.3375v bios (1.304v windows load)

eva2000 · 05-02-2008, 09:56 AM

32M runs just to test memory timings and stability at high memory clocks.

@3598Mhz

Code:

DFI LP LT X38-T2R 12/28 Beta Bios Settings

PC Health Status
Adjust CPU Temp: +10

CPU Feature
- Thermal Management Control: Disabled
-  PPM(EIST) Mode: Disabled
- Limit CPUID MaxVal: Disabled
- CIE Function: Disabled
- Execute Disable Bit: Disabled
- Virtualization Technology: Disabled
- Core Multi-Processing: Enabled

Exist Setup Shutdown: Mode 2
Shutdown after AC Loss: Disabled
CLOCK VC0 divider: AUTO
CPU Clock Ratio Unlock: Enabled
CPU Clock Ratio: 8.5x
- Target CPU Clock: 3166
CPU N/2 Ratio: Enabled
CPU Clock: 423
Boot Up Clock: AUTO
DRAM Speed: 266/800
- Target DRAM Speed: 1272
PCIE Clock: 100mhz
PCIE Slot Config: 1X 1X

CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled
SATA Spread Spectrum: Disabled

Voltage Settings
CPU VID Control: 1.2875v
CPU VID Special Add: AUTO
DRAM Voltage Control: 2.27v
SB Core/CPU PLL Voltage: 1.51
NB Core Voltage: 1.591
CPU VTT Voltage: 1.385
Vcore Droop Control: Enabled
Clockgen Voltage Control: 3.45v
GTL+ Buffers Strength: Strong
Host Slew Rate: Weak
GTL REF Voltage Control: Disable
x CPU GTL1/3 REF Volt: 110
x CPU GTL 0/2 REF Volt: 110
x North Bridge GTL REF Volt: 110

DRAM Timing
- Enhance Data transmitting: FAST 
- Enhance Addressing: FAST
- T2 Dispatch: Enabled 

Clock Setting Fine Delay
Ch1 Clock Crossing Setting: More Aggressive
- DIMM 1 Clock fine delay: 420
- DIMM 2 Clock fine delay: 420
- DIMM 1 Control fine delay: 490
- DIMM 2 Control fine delay: 350
- Ch 1 Command fine delay: 840

Ch2 Clock Crossing Setting: More Aggressive
- DIMM 3 Clock fine delay: 420
- DIMM 4 Clock fine delay: 420
- DIMM 3 Control fine delay: 420
- DIMM 4 Control fine delay: 350
- Ch 2 Command fine delay: 840

Ch1Ch2 CommonClock Setting: More Aggressive

Ch1 RDCAS GNT-Chip Delay: Auto
Ch1 WRCAS GNT-Chip Delay: Auto
Ch1 Command to CS Delay: Auto

Ch2 RDCAS GNT-Chip Delay: Auto
Ch2 WRCAS GNT-Chip Delay: Auto
Ch2 Command to CS Delay: Auto (where cpuz sees 1T or 2T SETTING)

CAS Latency Time (tCL): 5
RAS# to CAS# Delay (tRCD): 5
RAS# Precharge (tRP): 4
Precharge Delay (tRAS): 5
All Precharge to Act: 4
REF to ACT Delay (tRFC): 28
Performance LVL (Read Delay) (tRD): 6

Read delay phase adjust: Enter

Ch1 Read delay phase (4~0)
- Channel 1 Phase 0 Pull-In: Enabled
- Channel 1 Phase 1 Pull-In: Enabled
- Channel 1 Phase 2 Pull-In: Enabled
- Channel 1 Phase 3 Pull-In: Enabled
- Channel 1 Phase 4 Pull-In: Enabled

Ch2 Read delay phase (4~0)
- Channel 2 Phase 0 Pull-In: Auto
- Channel 2 Phase 1 Pull-In: Auto
- Channel 2 Phase 2 Pull-In: Auto
- Channel 2 Phase 3 Pull-In: Auto
- Channel 2 Phase 4 Pull-In: Auto

MCH ODT Latency: AUTO
Write to PRE Delay (tWR): 11
Rank Write to Read (tWTR): 11
ACT to ACT Delay (tRRD): 4
Read to Write Delay (tRDWR): 8
Ranks Write to Write (tWRWR): 4
Ranks Read to Read (tRDRD): 5
Ranks Write to Read (tWRRD): 4
Read CAS# Precharge (tRTP): 4
ALL PRE to Refresh: 4

eva2000 · 05-02-2008, 09:56 AM

@3996Mhz

Code:

DFI LP LT X38-T2R 12/28 Beta Bios Settings

PC Health Status
Adjust CPU Temp: +10

CPU Feature
- Thermal Management Control: Disabled
-  PPM(EIST) Mode: Disabled
- Limit CPUID MaxVal: Disabled
- CIE Function: Disabled
- Execute Disable Bit: Disabled
- Virtualization Technology: Disabled
- Core Multi-Processing: Enabled

Exist Setup Shutdown: Mode 2
Shutdown after AC Loss: Disabled
CLOCK VC0 divider: AUTO
CPU Clock Ratio Unlock: Enabled
CPU Clock Ratio: 9x
- Target CPU Clock: 3996
CPU N/2 Ratio: Enabled
CPU Clock: 444
Boot Up Clock: AUTO
DRAM Speed: 266/800
- Target DRAM Speed: 1335
PCIE Clock: 100mhz
PCIE Slot Config: 1X 1X

CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled
SATA Spread Spectrum: Disabled

Voltage Settings
CPU VID Control: 1.2875v
CPU VID Special Add: AUTO
DRAM Voltage Control: 2.49v
SB Core/CPU PLL Voltage: 1.51
NB Core Voltage: 1.643
CPU VTT Voltage: 1.385
Vcore Droop Control: Enabled
Clockgen Voltage Control: 3.45v
GTL+ Buffers Strength: Strong
Host Slew Rate: Weak
GTL REF Voltage Control: Disable
x CPU GTL1/3 REF Volt: 110
x CPU GTL 0/2 REF Volt: 110
x North Bridge GTL REF Volt: 110

DRAM Timing
- Enhance Data transmitting: FAST 
- Enhance Addressing: FAST
- T2 Dispatch: Enabled 

Clock Setting Fine Delay
Ch1 Clock Crossing Setting: More Aggressive
- DIMM 1 Clock fine delay: 630
- DIMM 2 Clock fine delay: 380
- DIMM 1 Control fine delay: 840
- DIMM 2 Control fine delay: 280
- Ch 1 Command fine delay: 840

Ch2 Clock Crossing Setting: More Aggressive
- DIMM 3 Clock fine delay: 630
- DIMM 4 Clock fine delay: 380
- DIMM 3 Control fine delay: 840
- DIMM 4 Control fine delay: 280
- Ch 2 Command fine delay: 840

Ch1Ch2 CommonClock Setting: More Aggressive

Ch1 RDCAS GNT-Chip Delay: Auto
Ch1 WRCAS GNT-Chip Delay: Auto
Ch1 Command to CS Delay: Auto

Ch2 RDCAS GNT-Chip Delay: Auto
Ch2 WRCAS GNT-Chip Delay: Auto
Ch2 Command to CS Delay: Auto (where cpuz sees 1T or 2T SETTING)

CAS Latency Time (tCL): 5
RAS# to CAS# Delay (tRCD): 5
RAS# Precharge (tRP): 5
Precharge Delay (tRAS): 9
All Precharge to Act: 4
REF to ACT Delay (tRFC): 30
Performance LVL (Read Delay) (tRD): AUTO

Read delay phase adjust: Enter

Ch1 Read delay phase (4~0)
- Channel 1 Phase 0 Pull-In: AUTO
- Channel 1 Phase 1 Pull-In: AUTO
- Channel 1 Phase 2 Pull-In: AUTO
- Channel 1 Phase 3 Pull-In: AUTO
- Channel 1 Phase 4 Pull-In: AUTO

Ch2 Read delay phase (4~0)
- Channel 2 Phase 0 Pull-In: Auto
- Channel 2 Phase 1 Pull-In: Auto
- Channel 2 Phase 2 Pull-In: Auto
- Channel 2 Phase 3 Pull-In: Auto
- Channel 2 Phase 4 Pull-In: Auto

MCH ODT Latency: AUTO
Write to PRE Delay (tWR): 13
Rank Write to Read (tWTR): 11
ACT to ACT Delay (tRRD): 4
Read to Write Delay (tRDWR): 8
Ranks Write to Write (tWRWR): 4
Ranks Read to Read (tRDRD): 5
Ranks Write to Read (tWRRD): 4
Read CAS# Precharge (tRTP): 4
ALL PRE to Refresh: 4

eva2000 · 05-02-2008, 09:56 AM

Max FSB

My E8500 Q740A493T on Asus Blitz Formula around 530-535FSB max 32M stable, on DFI X38 LT 12/28 beta bios around 520FSB when i hit a wall in memtest86+ v1.70 freezing on me - enabling GTL ref volts and tweaking clock fine delay values and setting 99/99/99 helped stabalize it at 520FSB but 525FSB is where it hits another wall. Stock SB/CPU PLL/PCI-E volts used and CPU VT 1.438 and NB 1.664v.

Update: Just flashed to 1/11 official bios and playing with low CPU VTT voltage FSB clocks right now. From the reading it seems 45nm Wolfdales may in fact like lower CPU VTT values with Intel specifications pegging CPU VTT default at ~1.1v compared to 65nm Core2s at ~1.2v CPU VTT.

eva2000 · 05-02-2008, 09:56 AM

reserved #1

eva2000 · 05-02-2008, 09:56 AM

reserved #2

eva2000 · 05-02-2008, 09:56 AM

reserved #3

scotty1991 · 05-02-2008, 04:31 PM

Wouldnt increasing the SB and PLL volts give you a higher fsb?

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