DFI Lanparty DK X48-T2RBS Plus bios, info, photos & overclocking tips
This is a discussion on DFI Lanparty DK X48-T2RBS Plus bios, info, photos & overclocking tips within the DFI Intel Motherboard / CPU forums, part of the Intel motherboards / CPU category; I guess the other thing I wanted to know eva, is if you had any kind of system for testing ...
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| | #41 (permalink) |
| Senior Member Join Date: Aug 28 2008
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I guess the other thing I wanted to know eva, is if you had any kind of system for testing the DRAM clock/driving options and skew models. There is scarce little documentation on what they actually do or even which levels are high and which are low. Oh, and if you could share some of those BIOS settings for your high 2:3 memory clocks |
| Last edited by GenAn; 21-12-2008 at 02:35 PM. | |
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| | #42 (permalink) |
| Senior Member Join Date: Aug 07 2008
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Just another note, 3oh6 says Rampage Extreme uses the ICS 9LPRS919BKL clock gen, which is the same clock gen used on the P5Q-Deluxe, whereas eternal fantasy says its ICS 9LPRS918JKLF. Wonder who is right or if maybe both were used at different times/revisions. Does increasing/altering the clock gen voltage and CPU clock amplitude affect/increase the max FSB achievable with the T2RSB Plus? |
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| | #43 (permalink) |
| Administrator | By CryptiK max 32M pi stable FSB i last tested was 563FSB - haven't tried pushing higher as yet as i seem to hit a 5:6 divider mem clock limit around 658mhz for super pi 32m stable settings so far. My aim is on fast 32m pi capable FSB so 1:1 doesn't cut it so far heh. Have yet to try 1:1 max fsb with 4-4-4-x timings.
MCH VREF 1/2/3 you mean - i did play with them only briefly - alot of values just end up with system no boot needing clear cmos, only value that had a minor effect in stabilising high mem clocks was MCH VREF 3 at value of 25. Digital PWM is rated for something like 110+ C, but it runs relative cool but i have a fan over than area anyway ![]() By GenAn Failed oc' recovery for me is shut down rig wait a few minutes and power up rig hitting the home key or delete key and loading last bootable settings from CMOS Reloaded
By GenAn memtest86+ is my starting point to see what each combination has to bring for max memtest86+ stable mem clocks, then i move on to windows tests. I always follow same approach as outlined at http://i4memory.com/f80/announcement...y-eva2000.html and the linked memtest86+ approach http://i4memory.com/f79/memtest86-v2-10-a-6/. There's no need to know which are high and low levels for what skew models are for each modules as i just go by what works for the particular memory I'm using on particular divider/fsb/mem config combination
![]() By CryptiK Probably a revision occured ?
Yeah clock gen voltage and cpu clock amplitude can stabilise FSB on the higher end borderline stable mark but it isn't a big boost. |
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| | #44 (permalink) |
| Senior Member Join Date: Aug 28 2008
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I tried your settings for 533FSB 640MHz on the memory with the 5-5-5-9 timings, it looks like the only D9GMH kit I have that will be able to do it is my Flex 9200. I left memtest running overnight, awakened to about 130 errors or so which really isn't that much; I'm confident a few tweaks will get it 100% stable. I guess it was my RAM all along and not so much the boards used... |
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| | #46 (permalink) |
| Senior Member Join Date: Aug 07 2008
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On the old DFI boards (DDR1) wasn't it the higher the number the weaker the drive strength? Like 1 was the strongest and 6 was the weakest for example? Nice work so far Gen-An, pity your other kits apart from the reapers don't seem up to the task. What tRD was that run done at? |
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