DFI Lanparty DK X48-T2RBS Plus bios, info, photos & overclocking tips
This is a discussion on DFI Lanparty DK X48-T2RBS Plus bios, info, photos & overclocking tips within the DFI Intel Motherboard / CPU forums, part of the Intel motherboards / CPU category; Congrats on 5ghz+ 32M New set of memory looks very good - maybe 680mhz 5-5-5-15 capable?...
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| | #146 (permalink) |
| Senior Member Join Date: Aug 07 2008
Posts: 595
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Further testing the new kit. It only needs 2.25v (idle) / 2.22v (load) for 660 MHz SPI32M stable. This board does not want to do 559 FSB / 670 MHz SPI32M stable, so I will probably have to drop to another divider to test this kit any higher. SPI32M @ 550 FSB / 660 MHz @ 2.25v / PL 8 ![]() Everest @ 550 FSB / 660 MHz @ 2.25v / PL 8 (same settings as SPI32M run) |
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| | #148 (permalink) |
| Junior Member Join Date: Feb 27 2009
Posts: 10
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I've been trying to understand the OC process and still don't completely understand it. This is what I've done in my testing and all seems well other then the heat. I've only changed these because everything else either causes my box to blue screen or never post. please can someone tell me what the best setting would be for me. I upgraded my box to 4core 3.0GHz and would like to OC it, but the heat puts me on the edge. I have a Zalman heatsink air , no water for me. In the bios: Code: CPU Feature - Thermal Management Control: Disabled - PPM(EIST) Mode: Disabled - Limit CPUID MaxVal: Disabled - CIE Function: Disabled - Virtualization Technology: Disabled - Core Multi-Processing: Enabled CPU Clock: 400 Voltage Settings CPU VID Control: 1.21875v |
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| | #150 (permalink) |
| Junior Member Join Date: Feb 27 2009
Posts: 10
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Quad CPU Q9650 @ 3.00GHz Code: PC Health Status Adjust CPU Temp: default CPU Feature - Thermal Management Control: Disabled - PPM(EIST) Mode: Disabled - Limit CPUID MaxVal: Disabled - CIE Function: Disabled - Virtualization Technology: Disabled - Core Multi-Processing: Enabled Exist Setup Shutdown: Mode 2 O.C. Fail retry Counter: 0 O.C. Fail CMOS Reload: Disabled CPU Clock Ratio: 9x CPU N/2 Ratio: Disabled Target CPU Clock: 3600Mhz CPU Clock: 400 Boot Up Clock: AUTO CPU Clock Amplitude: 800mv CPU Clock0 Skew: 0ps CPU Clock1 Skew: 0ps DRAM Speed: AUTO - Target DRAM Speed: DDR2-801 PCIE Clock: 100mhz CPU Spread Spectrum: Disabled PCIE Spread Spectrum: Disabled Voltage Settings CPU VID Control: 1.24375v CPU VID Special Add: AUT0 DRAM Voltage Control: 1.925v SB Core/CPU PLL Voltage: 1.510 NB Core Voltage: 1.265 CPU VTT Voltage: 1.100 Vcore Droop Control: Enabled Clockgen Voltage Control: 3.45v GTL+ Buffers Strength: Strong Host Slew Rate: Weak x MCH RON Offset Value: x MCH RTT Offset Value: x MCH Slew Rate Offset Value: x MCH VREF 1 Value: x MCH VREF 2 Value: x MCH VREF 3 Value: x CPU GTL 0/2 REF Volt: 0.667X x CPU GTL 1/3 REF Volt: 0.667X x North Bridge GTL REF Volt: 0.67X DRAM Timing - Enhance Data transmitting: AUTO - Enhance Addressing: AUTO - T2 Dispatch: AUTO Clock Setting Fine Delay - DRAM CLK Driving Strength: Level 6 - DRAM DATA Driving Strength: Level 8 - Ch1 DLL Default Skew Model: Model 0 - Ch2 DLL Default Skew Model: Model 0 Fine Delay Step Degree: 5ps Ch1 Clock Crossing Setting: AUTO - DIMM 1 Clock fine delay: Current 1924ps - DIMM 2 Clock fine delay: Curren 1074ps - DIMM 2 Control fine delay: Current 1012ps - DIMM 1 Control fine delay: Current 1012ps - Ch 1 Command fine delay: Current 1474ps Ch2 Clock Crossing Setting: AUTO - DIMM 3 Clock fine delay: Current 1000ps - DIMM 4 Clock fine delay: Current 837ps - DIMM 4 Control fine delay: Current 786ps - DIMM 3 Control fine delay: Current 124ps - Ch 2 Command fine delay: Current 24ps Ch1Ch2 CommonClock Setting: AUTO Ch1 RDCAS GNT-Chip Delay: Auto Ch1 WRCAS GNT-Chip Delay: Auto Ch1 Command to CS Delay: Auto Ch2 RDCAS GNT-Chip Delay: Auto Ch2 WRCAS GNT-Chip Delay: Auto Ch2 Command to CS Delay: Auto Common CMD to CS Timing: 1N/2N/AUTO (command rate) CAS Latency Time (tCL): AUTO RAS# to CAS# Delay (tRCD): AUTO RAS# Precharge (tRP): AUTO Precharge Delay (tRAS): AUTO All Precharge to Act: AUTO REF to ACT Delay (tRFC): AUTO Performance LVL (Read Delay) (tRD): AUTO Read delay phase adjust: Enter Ch1 Read delay phase (4~0) - Channel 1 Phase 0 Pull-In: AUTO - Channel 1 Phase 1 Pull-In: AUTO - Channel 1 Phase 2 Pull-In: AUTO - Channel 1 Phase 3 Pull-In: AUTO - Channel 1 Phase 4 Pull-In: AUTO Ch2 Read delay phase (4~0) - Channel 2 Phase 0 Pull-In: Auto - Channel 2 Phase 1 Pull-In: Auto - Channel 2 Phase 2 Pull-In: Auto - Channel 2 Phase 3 Pull-In: Auto - Channel 2 Phase 4 Pull-In: Auto MCH ODT Latency: AUTO Write to PRE Delay (tWR): AUTO Rank Write to Read (tWTR): AUTO ACT to ACT Delay (tRRD): AUTO Read to Write Delay (tRDWR): AUTO Ranks Write to Write (tWRWR): AUTO Ranks Read to Read (tRDRD): AUTO Ranks Write to Read (tWRRD): AUTO Read CAS# Precharge (tRTP): AUTO ALL PRE to Refresh: AUTO |
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| | #151 (permalink) |
| Administrator |
hi and welcome there's no one right settings as all cpu/mem/boards are different - but best to test via trial and error testing see http://i4memory.com/f79/memtest86-v2-11-v4-00-a-6/ and http://i4memory.com/f80/announcement...y-eva2000.html - if you follow these 2 threads, you're dramatically lessen you frequency of blue screens. But from what you posted your NB and CPU VTT voltages are too low most likely so I'd start there. |
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| | #152 (permalink) |
| Senior Member Join Date: Aug 07 2008
Posts: 595
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These boards are hard to clock quads on. You need to use much more Vtt than on other boards for the same FSB. Also needed way more vNB than on my Rampage Extreme for the same FSB/PL. It was fine at 1.149 Vtt up to 430 FSB, then it just hits a wall, and needs 1.275v for 445 FSB. Kind of odd behaviour. For 445 x 9, try these settings, worked for my Q9650. I just dusted the board off and tested it for you. 445 FSB PL8 Memory settings to 'normal' (can also use 'aggressive' but you'll need more vNB) CPU Skew 1 & 2 = 0ps vcore = whatever your cpu needs for 4GHz Vtt = 1.275v (may need more for stability just test it) vNB = 1.405v (if you use aggressive settings use ~1.49vNB) |
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