DFI Lanparty DK X48-T2RBS Plus bios, info, photos & overclocking tips

27-10-2008, 11:23 PM #17 (**permalink**)

Yeah still alot of testing and tweaking to come to squeeze out more FSB.

IIRC, X48 and the term binned referred to tightened internal latencies at stock 333/400FSB frequencies over X38. Nothing about higher FSB heh.

I can easily bench at 10x500 = 5000Mhz at 1.552v idle / 1.520v load with vdroop enabled for super pi 32M with the above setup. Tried 9x557FSB 5:6 668Mhz 5-5-5-15 but mem doesn't seem to like it with 5:6 divider after a few memtest loops heh. Just going to try 9x557FSB 1:1 and see how we go

02:13 AM

I just ram a comparison bench with my M2F at 533 FSB, 5:6 Divider, 5-5-5-15, tRFC 45, vdimm 2.25v, vNB 1.45v. I just managed to outperform the X48 across the board in your boot from bios untweaked run using your TeamGroup's, but your tweaked run got a slightly higher read bandwidth, and lower latency.

I had to push the board very hard to do it, and no way could I run SPI32M, I'd need 1.5 - 1.6 vNB & 2.3 - 2.45v vdimm for stability, but I'm still satisfied with the P45 result, I have not seen a P45 come close to a X38/X48 at the same settings.

I'm sure your board has much more in it though, and I could only get a little more out of mine if I upped the vdimm and tightened the timings a little.

Comparison Table:

Here is SPI32M at my 24/7 settings:

28-10-2008, 01:13 AM #19 (**permalink**)

Nice results there.. for full comparison might want to update to same Everest version as 4.50.x is a bit old now that 4.60.1536+ is out

28-10-2008, 01:18 AM #20 (**permalink**)

Yeah I know I've been meaning to for awhile now

28-10-2008, 04:09 AM #21 (**permalink**)

Max 32M Pi & Max CPUZ Validation
on H20

Time to push the E8600 Q820A599 *0464 cpu and Crucial Ballistix PC2-8500 Tracer memory and they certainly didn't disappoint - max highest H20 cooled Super Pi 32M yet @5093Mhz! To think this E8600 Q820A599 *0464 only did max Super Pi 1M @4952Mhz and max validation @5079Mhz at 1.552v idle on Gigabyte EP45-Extreme with exact same cooling setup.

Even better than my E8600 Q820A599 *0537 which did Super Pi 32M @5003Mhz at 1.568v idle with max CPUZ Validation @5146Mhz on DFI UT X48-T3RS DDR3 board.

E8600 Q820A599 *0464

Max CPUZ Validation @5146Mhz at 1.600v idle / 1.568v load
Super Pi 32M @5093Mhz at 1.600v idle / 1.568v load
Super Pi 32M @5025Mhz at 1.552v idle / 1.520v load

@5146Mhz

@5093Mhz - click image for full screenshot

@5025Mhz - click image for full screenshot

System:

E8600 Q820A599 0464
CPU Cooling: Dtek Fuzion Rad Tower Box
DFI LP DK X48-T2RBS Plus - 9/23 beta bios
128MB Gainward FX5200 PCI
2x1GB Crucial Ballistix PC2-8500 Tracer double sided Micron D9GMH dual channel kit
Memory cooling: 120x25mm Thermaltake 81cfm fan
750GB Samsung SATAII
Pioneer 215 DVD-RW
1200W Silverstone OP1200
WinXP Pro SP2 Nlite Fully Updated.

28-10-2008, 05:28 PM #22 (**permalink**)

That's nothing short of really impressive, really well done. That board sure is looking very tempting.

29-10-2008, 02:41 AM #23 (**permalink**)

Thanks.. will pluck in my eVGA 9800GX2 to see how it handles 3d stuff next

20-11-2008, 06:41 PM #24 (**permalink**)

HD4870x2 Crossfire + 8GB DDR2

Recently got my 2nd HD4870x2 video card (flashed to Asus HD4870x2 Top bios), so decided to try out 2x HD4870x2 Crossfire with 4x2GB DDR2 = 8GB memory configuration.

You'll definitely need to find the right combination for your memory modules for DLL Default clock skew models and DRAM CLK/DATA Driving Strength for full stability. I used Memtest86+ to quickly check which combinations produced the least number of errors at a particular borderline memory clock speed and then worked my way down to fine tuning stability in windows. Luckily, I tested each 2x2GB Mushkin PC2-8500 rated kit individually first, and eventually found the best combination for 2x2GB and 4x2GB was with the following:

Clock Setting Fine Delay
- DRAM CLK Driving Strength: Level 1
- DRAM DATA Driving Strength: Level 1
- Ch1 DLL Default Skew Model: Model 5
- Ch2 DLL Default Skew Model: Model 5

How important are the above 4 settings you ask ? Well at default 6/8/0/0 settings, I couldn't get even 2x2GB - 4GB config stable past 500Mhz 5-5-5-15 regardless of volts. The biggest difference was dropping DRAM CLK Driving Strength from 6 to 1.

4x2GB Mushkin @530Mhz 5-5-5-15 at 2.1v was fully stable for me. Individually, each 4GB kit did 568Mhz (Ascent XP2-8500) and 576Mhz (XP2-8500) at 5-5-5-15 at 2.1v.

Just to compare HD4870x2 Crossfire at stock 790/915 vs 837/985 with just E8600 @4.5Ghz and must be severely cpu limited for 3dmark benches only 3dmark2003 and 3dmark vantage showed any gain. That or Cat 8.11 RC2 drivers aren't working that well ?

System:

E8600 Q820A599 0464
CPU Cooling: Dtek Fuzion Rad Tower Box
DFI LP DK X48-T2RBS Plus - 9/23 beta bios
HIS HD4870x2 + Gigabyte HD4870x2 both flashed to Asus HD4870x2 TOP bios 790/915 default
4GB Mushkin Ascent XP2-8500 + 4GB Mushkin XP2-8500
Memory cooling: 120x25mm Thermaltake 81cfm fan
320GB Seagate 7200.10 SATAII
Pioneer 215 DVD-RW
1200W Silverstone OP1200
Vista Ultimate SP1 64bit fully vLite updated

Powermate meter = 831 Watts peak load

Results

Left (790/915) vs Right (837/985)

click link for full screenshot

3Dmark06 = 23,129 vs 23,188
3Dmark05 = 31,182 vs 31,071
3Dmark2003 = 124,982 vs 127,931
3Dmark Vantage = 16,924 vs 17,123

Bios Settings Used - 9/23 beta bios

Advance Mode

Code:

PC Health Status
Adjust CPU Temp: Auto

CPU Feature
- Thermal Management Control: Disabled
-  PPM(EIST) Mode: Disabled
- Limit CPUID MaxVal: Disabled
- CIE Function: Disabled
- Virtualization Technology: Disabled
- Core Multi-Processing: Enabled

Exist Setup Shutdown: Mode 2
O.C. Fail retry Counter: 0
O.C. Fail CMOS Reload: Disabled
CPU Clock Ratio: 8.5x
CPU N/2 Ratio: Enabled
Target CPU Clock: 4505Mhz
CPU Clock: 530
Boot Up Clock: AUTO
CPU Clock Amplitude: 800mv
CPU Clock0 Skew: 100ps
CPU Clock1 Skew: 0ps
DRAM Speed: 333/667
- Target DRAM Speed: DDR2-1060
PCIE Clock: 100mhz

CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled

Voltage Settings
CPU VID Control: 1.38750v
CPU VID Special Add: AUT0
DRAM Voltage Control: 2.10v
SB Core/CPU PLL Voltage: 1.51
NB Core Voltage: 1.579
CPU VTT Voltage: 1.380
Vcore Droop Control: Enabled
Clockgen Voltage Control: 3.45v
GTL+ Buffers Strength: Strong
Host Slew Rate: Weak
x MCH RON Offset Value:
x MCH RTT Offset Value:
x MCH Slew Rate Offset Value:
x MCH VREF 1 Value:
x MCH VREF 2 Value: 
x MCH VREF 3 Value:
x CPU GTL 0/2 REF Volt: 0.667X
x CPU GTL 1/3 REF Volt: 0.667X
x North Bridge GTL REF Volt: 0.61X

DRAM Timing
- Enhance Data transmitting: AUTO
- Enhance Addressing: AUTO
- T2 Dispatch: Disabled

Clock Setting Fine Delay
- DRAM CLK Driving Strength: Level 1
- DRAM DATA Driving Strength: Level 1
- Ch1 DLL Default Skew Model: Model 5
- Ch2 DLL Default Skew Model: Model 5

Fine Delay Step Degree: 5ps to 80ps

Ch1 Clock Crossing Setting: AUTO
- DIMM 1 Clock fine delay: Current 2024ps
- DIMM 2 Clock fine delay: Curren 1174ps
- DIMM 2 Control fine delay: Current 1112ps
- DIMM 1 Control fine delay: Current 1112ps
- Ch 1 Command fine delay: Current 74ps

Ch2 Clock Crossing Setting: AUTO
- DIMM 3 Clock fine delay: Current 1900ps
- DIMM 4 Clock fine delay: Current 937ps
- DIMM 4 Control fine delay: Current 886ps
- DIMM 3 Control fine delay: Current 224ps
- Ch 2 Command fine delay: Current 124ps

Ch1Ch2 CommonClock Setting: AUTO

Ch1 RDCAS GNT-Chip Delay: Auto
Ch1 WRCAS GNT-Chip Delay: Auto
Ch1 Command to CS Delay: Auto

Ch2 RDCAS GNT-Chip Delay: Auto
Ch2 WRCAS GNT-Chip Delay: Auto
Ch2 Command to CS Delay: Auto

Common CMD to CS Timing: 1N/2N/AUTO (command rate)

CAS Latency Time (tCL): 5
RAS# to CAS# Delay (tRCD): 5
RAS# Precharge (tRP): 5
Precharge Delay (tRAS): 15
All Precharge to Act: AUTO
REF to ACT Delay (tRFC): 72
Performance LVL (Read Delay) (tRD): 9

Read delay phase adjust: Enter

Ch1 Read delay phase (4~0)
- Channel 1 Phase 0 Pull-In: AUTO
- Channel 1 Phase 1 Pull-In: AUTO
- Channel 1 Phase 2 Pull-In: AUTO
- Channel 1 Phase 3 Pull-In: AUTO
- Channel 1 Phase 4 Pull-In: AUTO

Ch2 Read delay phase (4~0)
- Channel 2 Phase 0 Pull-In: Auto
- Channel 2 Phase 1 Pull-In: Auto
- Channel 2 Phase 2 Pull-In: Auto
- Channel 2 Phase 3 Pull-In: Auto
- Channel 2 Phase 4 Pull-In: Auto

MCH ODT Latency: AUTO
Write to PRE Delay (tWR): AUTO
Rank Write to Read (tWTR): AUTO
ACT to ACT Delay (tRRD): AUTO
Read to Write Delay (tRDWR): AUTO
Ranks Write to Write (tWRWR): AUTO
Ranks Read to Read (tRDRD): AUTO
Ranks Write to Read (tWRRD): AUTO
Read CAS# Precharge (tRTP): AUTO
ALL PRE to Refresh: AUTO