4/28 Beta Bios results - DFI UT X58-T3EH8
This is a discussion on 4/28 Beta Bios results - DFI UT X58-T3EH8 within the DFI Intel Motherboard / CPU forums, part of the Intel motherboards / CPU category; Been playing with DFI's latest 4/28 pre-public beta bios and it seems to have improved memory clocking stability for Elpida ...
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01-05-2009, 10:15 AM
| #1 (permalink) |
| Administrator |  4/28 Beta Bios results - DFI UT X58-T3EH8
Been playing with DFI's latest 4/28 pre-public beta bios and it seems to have improved memory clocking stability for Elpida IC modules as well as improved my max H20 cooled bclk validation from 233 on 3/28 pre-public beta bios to 235bclk on 4/28 bios. 4/28 bios seems to be more tolerant of very tight subtimings .. so close to sub 9min 32M pi at <3900Mhz!  sub 4000Mhz 32M  |
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01-05-2009, 10:16 AM
| #2 (permalink) |
| Administrator | Max BCLK   Super Pi 1M to 32M
 System:
Bios settings used. Code: Genie BIOS Setting CPU Feature Set VR Current Limit Max: Disabled Thermal Management Control: Disabled EIST Function: Disabled CxE Function: Disabled Execute Disable Bit: Disabled Virtualization Technology: Disabled ***** Logical Processor Setting ***** Intel HT Technology: Enabled Active Processor Cores: All DRAM Timing Channel Interleave Setting: AUTO Rank Interleave Setting: AUTO Memory LowGap: 1792M DRAM Command Rate: AUTO CAS Latency Time (tCL): 6 RAS# to CAS# Delay (tRCD): 7 RAS# Precharge (tRP): 6 Precharge Delay (tRAS): 20 REF to ACT Delay (tRFC): AUTO Write to PRE Delay (tWR): AUTO Rank Write to Read (tWTR): AUTO ACT to ACT Delay (tRRD): AUTO Row Cycle Time (tRC): 31 Read CAS# Precharge (tRTP): AUTO Four ACT WIN Time (tFAW): 31 Ch1 Round trip latency: AUTO (-15 to +16) Ch2 Round trip latency: AUTO (-15 to +16) Ch3 Round trip latency: AUTO (-15 to +16) tREFI: AUTO Voltage Setting O.C. Shut Down Free: Enable O.C.S.D.F CPU VID Control: 1.4500v CPU VID Special Add Limit: Disabled CPU VID Special Add: 103.30% Vcore Droop Control: Disabled DRAM Bus Voltage: 1.71v DRAM PWM Switch Frequency: Nominal DRAM PWM Phase Control: 2 Phase Operation CPU VTT Special Add: 0.0875v CPU VTT Voltage: 1.53v VTT PWM Switch Frequency: Nominal VTT PWM Phase Control: 2 Phase Operation CPU PLL Voltage: 1.80v IOH/ICH 1.1V Voltage: 1.29v IOH Analog Voltage: 1.20v ICH 1.5 Voltage: 1.5v ICH 1.05V Voltage: 1.05v DIMM 1/2 DQ/DQSTB Bus VREF: -00.0% DIMM 3/4 DQ/DQSTB Bus VREF: -00.0% DIMM 5/6 DQ/DQSTB Bus VREF: -00.0% ADDR/CMD VREF Control: Disabled x DIMM 1/2 ADDR/CMD Bus VREF: 110 x DIMM 3/4 ADDR/CMD Bus VREF: 110 x DIMM 5/6 ADDR/CMD Bus VREF: 110 CPU QPI Drive Strength: Normal IOH QPI Drive Strength: Normal Exit Setup Shut down: Mode 2 O.C. Fail Retry Counter: Enabled O.C. Fail CMOS Reload: Disabled PPM Function: Enabled Turbo Mode Function: Disabled 1 core Max Turbo Ratio: 22x 2 core Max Turbo Ratio: 21x 3 core Max Turbo Ratio: 21x 4 core Max Turbo Ratio: 21x CPU Non-Turbo Clock Ratio: 19x * BCLK/UCLK/QPI Controller Settings * QPI Control Settings: Enabled QPI Link Fast Mode: Enabled QPI Frequency: AUTO CPU Base Clock (BCLK): 230 Mhz Boot Up CPU Base Clock: AUTO PCIE Clock: 110 Mhz DRAM Frequency: 8xx Memory multipliers UnCore Frequency: 16x Uncore multipliers CPU Spread Spectrum: Disabled PCIE Spread Spectrum: Disabled Starting to hit probably thermal limits of my i7 920 3836A756 on H20 cooling as 32M Pi seems to be topping out around 4680mhz with HT disabled. Only managed to shave ~1 second off my best 32M pi time with i7 920.  |
| Last edited by eva2000; 01-05-2009 at 05:09 PM. | |
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01-05-2009, 10:16 AM
| #3 (permalink) |
| Administrator |
Did 2 runs on fresh Win 7 64bit RC install I did last night. Only change was CPU VTT voltage needed to pass Hyper Pi 8x 32M vs 4x 32M.
RTL value for channel A changed when CPU VTT changed from 1.44v to 1.47v RTL A/B/C = 56/57/58  RTL A/B/C = 55/57/58  Past bioses and tests, I found memory bandwidth in memtest86+ v2.11 was higher with HT disabled than HT enabled, so could explain why more CPU VTT volts is needed for HT disabled. 4//28 looking sweet indeed 8x 32M Super Pi instance via HyperPi @DDR3-2080Mhz 7-8-7-20 1T at 1.725v bios set vdimm = 1.730v real DMM vdimm.   |
| Last edited by eva2000; 03-05-2009 at 06:02 PM. | |
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01-05-2009, 10:16 AM
| #4 (permalink) |
| Administrator |
Both cstkl1 and my DFI contact suggested with 4/28 bios, I check out setting BOOT Up CPU Base Clock to around 180-185bclk for better perrformance and stability. Seems to work as first test has me reducing my required CPU VTT volts from 1.43v to 1.37v for 8x 32M Pi test!!!!   
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| Last edited by eva2000; 05-05-2009 at 11:57 PM. | |
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01-05-2009, 10:16 AM
| #5 (permalink) |
| Administrator |
My latest HD4870x2 Crossfire results System:
  3dmark2003 get the following error when i start it ??
 Throw in some wprime    Powermate wattage meter measured peaked power draw from wall = 1018 Watts! |
| Last edited by eva2000; 11-05-2009 at 02:02 AM. | |
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| Tags |
| 230bclk, 235bclk, 4/28 beta bios, corsair dominator gt, dfi ut x58, ek supreme lt, elpida, feser 480 |
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