eva2000

Intel Core 2 Duo E6600 Conroe + Asus P5W DH Deluxe

Thanks to Asus, I finally got my hands on a Asus P5W DH Deluxe for the sole purpose of cranking out some nice benchmarks. This board is the newly revised P5W DH which later P5W DH Deluxes will feature a higher max MCH volts of 1.85v


Full pictures:
http://i4memory.com/reviewimages/mot.../asus/P5WDH/1/

System:

• Intel Core 2 Duo E6600 QPGE B1 Step 5
• Swiftech G4 Storm water cooled cpu
• Asus P5W DH Deluxe 0801 bios
• 256MB BFG 7800GTX 84.66 SLI drivers
• 2x1GB Gskill PC6400PHU2 2GBHZ Micron D9 (cooled by Sunon 92x38mm 120cfm fan on rheobus medium speed)
• 74GB WD Raptor 8MB cache
• FDD
• 700W OCZ GameXStream Psu

General observations and notes:

• The setup and installation went problem free so started some stock load tests.
• I read the guide to known P5W DH issues and workarounds at http://www.xtremesystems.org/forums/...d.php?t=110193
• I followed the guide FCG wrote at http://www.xtremesystems.org/forums/...d.php?t=106563 for preparing the board by reapplying the TIM on the Northbridge/MCH and Southbridge heatsinks and removed their respectively covers to allow the actual heatsinks to breathe. I also added a 120x25mm fan over my video card which cools my SB heatsink and another 120x25mm fan over the NB and cpu socket area.
• I plugged in my 74GB WD Raptor 8MB drive into the red SATA1 connector on motherboard as explained in the manual
• Get use to the board auto shutting down on exiting bios, memtest or windows and automatically booting up again at speeds other than default 266fsb. Seems it's like Intel D975XBX Badaxe when changing boot straps. It's the boards way of ensuring the bios settings are properly set for booting. Can be quite annoying when rebooting windows when doing benchmark sessions. Actually, I got a reply from an Asus contact about the auto power down:
  

  This behaviour is caused by system's limitation. For over-clocking, the
  internal PLL of NB would not lock on the high clock right away, so that means
  system could not hold on the clock frequency immediately after reset. That's
  why we add a auto-power down scheme to fix this issue. Of course, this
  behaviour only occurs at over-clocking scenario.

• Seems AI Booster under reports cpu temps by around 8-10C. Coretemp app reports stock cpu idle and load temps in line with what my Intel D975XBX Badaxe Rev304 motherboard for this Core 2 Duo E6600 Conroe cpu.
• AI Booster loads awfully slowly and like Asus Probe II app both consume too much memory when open for my liking >10-12+ MB per app!
• AI Booster has a habit of not displaying the right temp with occassional jumps to 255C.
• AI Booster reported memory voltage is inaccurate i.e. 2.1v in bios = 2.2v in AI Booster, 2.2v in bios = 2.3v AI Booster, 2.3v bios = 0.00v AI Booster, and 2.35v = 6.54v in AI Booster!
• In bios monitoring section it can momentarily freeze or hang on you, no one knows why but if you wait a tad longer it will function fine and no probs. Just another issue to get use to.
• The board does droop alot more than Intel D975XBX Badaxe (which was fairly stable on vcore when Enhanced Power slope was enabled). P5W DH doesn't have such a function to reduce drooping on vcore voltage. There's around ~0.03 to 0.05v vcore droop under load in windows. For example, 1.425v in bios = 1.40-1.41v idle vcore in AI Booster in windows and under load that droops to around 1.376-1.384v.
• The P5W DH does have a few issues related to dividers like 4:5, 3:5 and 2:3 http://i4memory.com/f54/intel-core-2-duo-e6600-conroe-asus-p5w-dh-deluxe-3034/#post47176 but 1:1 seems to be stable. At 1:1 chipset latencies might be tighter on P5W DH than Badaxe at 1067fsb strap.
• For P5W DH the memory timing option of tRFC is set at 28 in 1:1 while in 2:3 tRFC is set at 42 and 4:5 tRFC is set at 35. This actually seems to be same as Intel D975XBX Badaxe i tested 1:1 and 4:5 both have by default tRFC of 28 and 35 respectively but I guess MCH/chipset latencies are a bit tighter on P5W DH by default.
• Both boards set tRD memory timing to 6 and both Intel D975XBX and P5W DH when close to their respective board max FSB limits, can be pushed past that FSB wall limit a tad by loosening tRD from 6 to 7 and loosening tRFC from their defaults (if you don't have enough vdimm and vMCH voltage). If you have enough vdimm and vMCH voltage you may be able to keep tRFC tight and just loosen tRD to 7. For example http://i4memory.com/showthread.php?p=47176#post47176

Dual Stressprime 2004 'Orthos' dual core testing:

Note:
1. vdimm of 2.1v in bios shows up as 2.15v in AI Booster.

------------------------------------------------------
Stock 2400mhz at 1.242v vcore (AUTO):

vCore = AUTO
fsb = AUTO
vdimm = 2.1v
MCH = AUTO
ICH = AUTO

Idle:
AI Booster = 20C
Coretemp = 29-30C

Load:
AI Booster = 29C
Coretemp = 37-39C

------------------------------------------------------
3207mhz at 1.242v vcore (AUTO):

vCore = AUTO
fsb = AUTO
vdimm = 2.1v
MCH = AUTO
ICH = AUTO

Idle:
AI Booster = 19C
Coretemp = 28-29C

Load:
AI Booster = 31C
Coretemp = 41C

------------------------------------------------------
3558mhz at 1.38v vcore idle 1.35-1.36v load:

vCore = 1.4v
fsb = 1.3v
vdimm = 2.1v
MCH = 1.55v
ICH = AUTO

Idle:
AI Booster = 21C
Coretemp = 30-31C

Load:
AI Booster = bugged display
Coretemp = 48=50C

------------------------------------------------------
Seems to be about the same as on my Intel D975XBX when @3600mhz at 1.376-1.384v vcore load (Badaxe needed 1.371v vcore) but with P5W DH needed to raise MCH volts from 1.55v to 1.65v P5W DH consistently needs around 0.05v more vcore under load than what i needed on Intel D975XBX Badaxe heh.

vCore = 1.425v
fsb = 1.3
vdimm = 2.1v
MCH = 1.65
ICH = AUTO



Super Pi @9x400fsb = 3600Mhz 1:1 4-4-4-12 at 2.1v
32M Single = 14min 21.421s
32M Dual = 16min 12.000s / 16min 13.437s

Isolated memory clock tests:

Now that I've found a nice stable reference clock to work with (3600mhz at 1.376v), it's time to fine a nice stable memory clock to work with using async upclock dividers. I used memtest86+ v1.65 and in windows Systool dual 32M PI (cpu test) runs to do some fairly quick tests. I've found if you can pass Systool dual 32M PI (cpu test) you can fairly easily pass Super Pi 32M single and dual instance tests

Memtest86+ v1.65:
All tests done at 4-4-4-12 4 timings:

• 501mhz at 2.20v = PASSED
• 513mhz at 2.25v = PASSED
• 513mhz at 2.30v = PASSED
• 517mhz at 2.30v = FAILED with 2 errors on 2nd pass of Test #5
• 520mhz at 2.30v = FAILED with 14 errors 1st pass of Test #5
• 520mhz at 2.35v = PASSED
• 525mhz at 2.35v = PASSED
• 528mhz at 2.35v = FAILED with 4 errors on 4th pass and 2 errors on 6th pass of Test #5
• 533mhz at 2.35v = FAILED with 558 errors on 1st pass of Test #5
• 534mhz at 2.40v = PASSED

Super Pi v1.5 - single and dual tests:
----------------------------------------------------------------------------
I set 800 (2:3) upclock divider to test my 2x1GB Gskill PC6400PHU2 HZ Micron D9s @4-4-4-12 4 timings. I set bios to:

fsb = 334fsb
vcore = 1.35v
vdimm = 2.20v (AI Booster reports 2.3v)
fsb = 1.3v
mch = 1.65
ich = AUTO

334fsb with 2:3 upclock had the memory running at 501mhz 4-4-4-12 at 2.2v. It failed Systool dual 32M PI (cpu test) near the end. So i dropped fsb from 334fsb to 333fsb via AI Booster app so that memory was running at 500mhz 4-4-4-12 at 2.2v. At 500mhz 4-4-4-12 it passed Systool dual 32M PI test fine. So ran single and dual Super Pi v1.5 32M tests with the following results @9x333fsb = 3001Mhz:

Super Pi @9x333fsb = 3001Mhz 2:3 500mhz 4-4-4-12 at 2.2v
32M Single = 16min 21.859s
32M Dual = 17min 42.062s / 17min 39.641s

----------------------------------------------------------------------------
Now from quick memtests and Systool dual 32M PI (cpu tests) with 2.3v vdimm in bios, memory found it's stable mark at 513mhz 4-4-4-12 at 2.3v.

vcore = 1.35v
vdimm = 2.30v (AI Booster reports 0.00v heh)
fsb = 1.3v
mch = 1.65
ich = AUTO

Super Pi @9x342fsb = 3082Mhz 2:3 513mhz 4-4-4-12 at 2.3v
32M Single = 15min 55.500s
32M Dual = 17min 14.547s / 17min 12.328s

----------------------------------------------------------------------------
Bump memory voltage to 2.35v vdimm in bios, and managed to get memory to 525mhz 4-4-4-12 at 2.35v.

vcore = 1.35v
vdimm = 2.35v (AI Booster reports 6.54v LOL buggy heh)
fsb = 1.3v
mch = 1.65
ich = AUTO

Super Pi @9x350fsb = 3154Mhz 2:3 525mhz 4-4-4-12 at 2.35v
32M Single = 15min 30.609s
32M Dual = 16min 51.375s / 16min 48.594s

----------------------------------------------------------------------------
Bump memory voltage to 2.4v vdimm in bios, and managed to get memory to 533mhz 4-4-4-12 at 2.4v. systool dual 32M PI (cpu test) failed near end of run at 534mhz 4-4-4-12 at 2.4v, so using clockgen bumped it down to 533mhz 4-4-4-12 at 2.4v which passed fine.

vcore = 1.35v
vdimm = 2.4v (AI Booster reports 0.01v)
fsb = 1.3v
mch = 1.65
ich = AUTO

Super Pi @9x355fsb = 3200Mhz 2:3 533mhz 4-4-4-12 at 2.4v
32M Single = 15min 20.453s
32M Dual = 16min 36.657s / 16min 33.500s

So looks like for Super Pi v1.50 32M at least I've managed to get 2x1GB Gskill PC6400PHU2 2GBHZ Micron D9GMH to 533mhz 4-4-4-12 at 2.4v.

CPUZ Validation:
http://valid.x86-secret.com/show_oc.php?id=114620



----------------------------------------------------------------------------
Next up.... finding P5W DH's max fsb limit at 1.65v MCH and 1.85v MCH




.

eva2000

Max FSB Results:

Now the fun part, finding the max fsb this P5W DH is capable of With FSB volts at 1.3v and MCH volts at 1.65v for now I managed being able to boot from bios at 9x442fsb = 3978Mhz at 1.54-1.55v.

I tried 9x444fsb but not able to boot up. Whether that's a fsb limit of cpu/vcore/cooling limited not sure - will investigate later

9X442fsb = 3978Mhz

CPUZ Validation:
http://valid.x86-secret.com/show_oc.php?id=114677

click on image for full screenie


Next I'd drop the cpu multiplier using Crystalmarkcpuid for 8x and see how high I can take the fsb still with MCH volts at 1.65v.

To test max fsb, I decided to boot into windows from bios at 9x440fsb = 3960mhz at 1.575v vcore bios (1.54-1.57v windows load-idle) and then using Crystalmarkcpuid to drop from 9x to 8x cpu multiplier for tests.

I used only Systool dual 32M PI (cpu test) and Super Pi v1.50 single and dual 32M tests to test max fsb.

Bios Settings:

vdimm = 2.2v
vFSB = 1.3v
vMCH = 1.65v
vICH = AUTO
Performance mode = AUTO
Hyperpath3 = Disabled

@8x440fsb = 3522mhz 1:1 memory @440mhz 4-4-4-12 4
I managed to pass single 32M Super Pi but one core failed dual 32M Super Pi with vMCH of 1.65v.

Super Pi v1.50
single 32M = 14min 14.703s
dual 32M = core 1 failed at 17th iteration

Increased vMCH to 1.75v in bios and 8x440fsb dual 32M Super Pi completed with no problems.

click image to see full screenshot


How far can we take fsb with vMCH 1.75v ? Seems 447fsb was only good enough for single 32M Super Pi, as dual 32M failed. So dropped back to 445fsb which passed fine.

@8x447fsb = 3576mhz 1:1 memory @447mhz 4-4-4-12 4
I managed to pass single 32M Super Pi but one core failed dual 32M Super Pi at 19th iteration on core #2 with vMCH of 1.75v.

Super Pi v1.50
single 32M = 14min 04.844s
dual 32M = core 2 failed at 19th iteration

@8x445fsb = 3561mhz 1:1 memory @445mhz 4-4-4-12 4

Super Pi v1.50
single 32M = 14min 09.438s
dual 32M = 15min 48.875s / 15min 46.640s

Summary of max FSB tests:

Right now it looks like for stock heatpipe cooling on MCH/NB:

vMCH = max fsb
1.65v = ~438fsb
1,75v = ~445fsb
1.85v = not tested yet

I guess the default chipset latencies are very tight and the factor of adequate MCH/NB cooling come into play. FCG's FSB scaling report at http://www.xtremesystems.org/forums/...d.php?t=105940 refers to better cooled MCH with MCH volt modded AFAIK. Also, I have yet to test simonmaltby's fsb scaling frequency tests in relation to memory timing options for tRD and tRFC http://www.xtremesystems.org/forums/...d.php?t=111400.

eva2000

More memory testing...

After testing 2 sets of 2x1GB Gskill PC6400PHU2 HZ Micron D9GMH memory, it seems pair #2 is doing much better than pair #3 so far

Pair #2
* 510mhz 4-4-4-12 at 2.20v
* 519mhz 4-4-4-12 at 2.25v
* 523mhz 4-4-4-12 at 2.30v
* 533mhz 4-4-4-12 at 2.35v
* 541mhz 4-4-4-12 at 2.40v

vs

Pair #3
* 501mhz 4-4-4-12 at 2.20v
* 513mhz 4-4-4-12 at 2.25v
* 525mhz 4-4-4-12 at 2.35v
* 534mhz 4-4-4-12 at 2.40v

Pair #2 of 2x1GB Gskill PC6400PHU2 HZ Micron D9GMH (0629) managed single 32M @542mhz 4-4-4-12 at 2.4v and dual 32M @541mhz 4-4-4-12 at 2.4v using default advance timings

single 32M @542mhz 4-4-4-12 at 2.4v


dual 32M @541mhz 4-4-4-12 at 2.4v

eva2000

Unfortunately, my P5W DH with 0801 bios with 2x1GB Gskill PC6400PHU2 HZ Micron D9GMH (0629) doesn't seem to like 4:5 upclock divider past 378fsb (gives 472mhz mem) for now Nor does it like 2:3 beyond 360fsb (gives 541mhz mem). This is with manually set timings of 4-4-4-12 regardless of vdimm used. Haven't tried setting SPD for memory to boot yet.

P5W DH i have doesn't seem to like 4-4-3 timings where tRP = 3 either, can't pass memtest86+ v1.65 higher than 460-472mhz 4-4-3 (manually set in bios) regardless of vdimm used or divider used. Same memory on Badaxe board did 488mhz 4-4-3-5 at 2.2v!

But 1:1 seems best for E6600 due to max fsb limitations I wonder how far i can go just for testing single Super Pi v1.50 32M

Testing max single Super Pi v1.50 32M:

vdimm = 2.3v (seems to help stable things due to tighter timings at 1:1 clocks especially when you get closer to P5W DH's max FSB wall)

Bios Settings:

vFSB = 1.3v
vMCH = 1.65v
vICH = AUTO
Performance mode = Standard
Hyperpath3 = Disabled
DDRAM Throttling = Disabled

* All tests are straight boot from bios with manual timings set at 4-4-4-8 4 at 2.3v
* All tests are untweaked with default P5W DH set timings. Have yet to even tweak with memset or drop tRP to 3 yet.

@3807Mhz - 9x423fsb at 1.55v bios vcore = 1.508 bios
32M = 13min 41.797s

@3897Mhz - 9x433fsb at 1.6v bios vcore
32M = 13min 16.672s

@3924Mhz - 9x436fsb at 1.625v bios vcore
32M = 13min 09.953s

@3942Mhz - 9x438fsb at 1.6375v bios vcore
32M = 13min 09.578s

Hit max FSB limit of vMCH 1.65v, raised vMCH to 1.75v

@3960Mhz - 9x440fsb at 1.65v bios vcore
32M = 13min 04.969s

@3987Mhz - 9x443fsb at 1.6625v bios vcore = 1.64v windows idle and 1.61-1.63v load
32M = 13min 00.750s



Yes I could sneeze and break 13min

Now to try tighter memory timings of 4-4-3-8. I started to test at 9x437fsb = 3934Mhz 1:1. It seems for default P5W DH advance timings I can pass 32M find. But if I try tightening the advance timings in memset @437mhz 4-4-3-8 it will fail..... unless I loosen tRD from 6 to 7. Then I can tighten all the rest of the memset timings while keeping tRD at 7

Bios Settings:

vCore = 1.65v
vDIMM = 2.3v
vFSB = 1.3v
vMCH = 1.65v
vICH = AUTO
Performance mode = Standard
Hyperpath3 = Disabled
DDRAM Throttling = Disabled

@3934Mhz - 9x437fsb, default P5W DH timings (left) vs memset tweaked timings with tRD set at 7. (right)
Super Pi 32M = 13min 04.594s vs 13min 01.125s

So decided to use Clockgen to boost fsb from 437fsb to 440fsb and guess what with tRD loosened to 7, it passed fine without needing vMCH of 1.75v! This was done with vMCH of 1.65v @3962Mhz - 9x440fsb 4-4-3-8




Time to try and max out this E6600 of mine

vcore = 1.6625v bios = 1.64v idle windows /1.61-1.62v under load
vdimm = 2.35v
vFSB = 1.3v
vMCH = 1.75
vICH = AUTO
Performance Mode = Standard

http://valid.x86-secret.com/show_oc.php?id=115697


Max 32M so far

@4011Mhz - 9x445fsb 1:1 4-4-3-8


@3986Mhz - 9x443fsb 1:1 4-4-3-8

eva2000

Analysis of P5W DH memory 4:5 and 2:3 dividers

I've been messing around with 4:5 and 2:3 dividers are lower FSB clocks and checking memset to see what values are being set since i'd having issues in memtest86+ v1.65 test #7 errors in high fsb 4:5 mode.

In 2:3 I maxed out my memory @542mhz 4-4-4-12 at 2.4v which showed the following memset timing values



tRFC = 42
tRD = 6
Write to Precharge Cmd = 13
Write to Read Cmd = 10
Read-Write Turnaround CLKs = 8
Write-Read Turnaround CLKs = 6
tRTP = 5

Now in 4:5 mode the only changes in memset are for:

tRFC = 35
Write to Precharge Cmd = 12

As you see it's tighter than at 2:3 set memset timings. So I booted into windows from bios at 9x378fsb 4:5 with memory at 472.5mhz 4-4-4-12 at 2.3v and used clockgen to clock up incrementally to test the max FSB:MEM clocks and find out how loosening these memset options will effect max 4:5 FSB:MEM clocks.

Results:
Using Systool dual 32M PI (cpu test), I managed to use Clockgen to raise FSB from 378fsb to 394fsb (493mhz 4-4-4-12 for memory) before it started to fail/error out. This was still with default memset timings where tRD = 6. I then raised tRD from 6 to 7, and easily managed to raise FSB from 394fsb to 400fsb (500mhz 4-4-4-12 for memory) and pass the tests without errors!

With tRD = 7, i could even tighten tRFC from 35 down to 20 with no problems.

@3600Mhz - 9x400fsb 4:5 500mhz 4-4-4-8 at 2.3v (more vdimm allows to handle tigher tRFC values but tRD needed 7)


So it does seem for 4:5 divider the culprit maybe tRD = 6. Now some folks managed to get high 4:5 clocks on P5W DH and I suspect this due to higher voltages or voltage mods on vdimm and vMCH as these two voltages help the memory/MCH handle the tight tRD value of 6 apparently. With enough voltage you could clock the memory higher for 4:5 ratio

Seems to me that for 975x chipset, both the max FSB limits and inability to handle high fsb in 4:5 and 2:3 dividers all comes down to tRD being too tight at 6. How far you can take your FSB and clocks in async divider mode, depend on:

1. MCH/NB quality and latencies
2. MCH/NB cooling - better MCH/NB cooling = higher FSB and higher memory clocks
3. MCH Voltage
4. Memory modules used - if the memory can handle tRD = 6 well then it will clock higher, allowing high FSB
5. vDIMM - memory voltage helps memory handle tighter advance timings, thus higher max FSB

Further proof, i upped vdimm to 2.4v with vMCH still at 1.65v and booted into windows at 9x390fsb 4:5 487mhz 4-4-4-8. Using memset loosened timings to match that of default 2:3 divider tRFC = 42 and Write to Precharge Cmd = 13 but loosened tRD from 6 to 7. Managed to clock memory right up to 540mhz 4-4-4-8 at 2.4v without problems for single 32M and 538mhz 4-4-4-8 for dual 32M.

Single 32M @540mhz 4-4-4-8 at 2.4v


Dual 32M @538mhz 4-4-4-8 at 2.4v


And now tightening the rest of memset timings while tRD = 7

eva2000

Decide to push my E6600 a bit harder with stock heatpipe MCH/NB heatsink still, i bumped vcore and vMCH in bios to 1.675v (1.64-1.65v windows) and 1.85v respectively and managed to pull off

Max cpu validation @4261mhz - 9x473fsb
1M @4115mhz - 9x457fsb
32M @4023mhz - 9x447fsb

eva2000

Radiical Chipset Waterblock Installation

Time has come to remove stock heatpipe MCH/NB heatsink and replace it with Radiical.com.au chipset waterblock

First, I cut a piece of sticky back insulation foam horizontally to a paper near paper thin height and stuck it on the 2 corners of MCH green PCB near the hooks. Just added precaution in case i crush the MCH chipset core heh. Second, I put some Microcool silver mosfet heatsinks on the mosfets near the cpu socket.



Then mounted the Radiical chipset waterblock.



I put a thermal probe on top of my chipset waterblock too. At 9x448fsb = 4032Mhz at 1.675v (1.65v) and 1.85v MCH volts, even the top of chipset block gets hot ~40.5C to 42.5C under 32m Super Pi load and ~20C idle at 1st boot and rises to around ~26C idle in windows and post 32M load around ~39.1C idle consistently. This is with 22.5C room temps. This really does say don't use 1.85v MCH volts on air cooled MCH/NB heatsinks as it must get bloody hot!!!

I started with early memtest86+ v1.5 testing, hoping that water cooled MCH/NB would give me higher memory clocks like it did on Intel D975XBX Badaxe. Unfortunately, the improvement in memory clocks was minor at 2:3 divider.

At 2:3 divider:

* before stock heatpipe air cooled MCH = max memory clock was 542mhz 4-4-4-12 at 2.4v
* radiical chipset water cooled MCH = max memory clock 542mhz 4-4-4-12 at 2.4v but could pass one loop of 545mhz 4-4-4-12 at 2.4v before memtest froze.

At 4:5 divider improvement was a bit better than at 2:3 divider even though tRD is still set too tight at 6:

* before stock heatpipe air cooled MCH = max fsb/mem clock before test #7 errored was at 378FSB with mem at 472mhz 4-4-4-12
* radiical chipset water cooled MCH = max fsb/mem clock before test #7 errored was now at 392FSB with mem at 490mhz 4-4-4-12

Max FSB at 1.65v MCH volts with dropping cpu multiplier to 8x, seems to still be around the same as on air at 438FSB. This could either mean I have a bad chipset waterblock mount, or it's not temps that is limiting FSB at 1.65v MCH volts but voltage itself or the memory used or more likely the tightness of the memset advance memory timings used. Even at 9x multiplier seems with 1.85v MCH the FSB limit has only improved a tad from 447FSB 32M to 448FSB 32M, it could be related to memset timings as i tightened them from the default to get the best 32M times or it could be due to vcore or cpu cooling since 9x448FSB is 4032Mhz

I'm leaning to either too tight memset values or a bad chipset waterblock mount as I did have a bit of trouble mounting the 2nd thread hook to the motherboards' hooks, so will remount it a bit later.

But for now still on first mount of chipset block, I managed to pull of a dozen runs of 32M at 9x448-449fsb testing different memset timings

On stock heatpipe MCH heatsink best i could do was 9x447fsb = 4023mhz for 12min 43.609s

Now with Radiical Chipset waterblock cooling MCH here's what i managed:

@9x448fsb straight boot from bios and memset set tRFC = 26 and other timings dropped to what you see below


@9x449fsb with tRD 7


@9x449fsb with tRD 6


Update: September 7, 2006
Interesting when setting up my phase change gear and transporting the chipset cooling loop over to the new position, I noticed the MCP350 pump outlet barb tubing had been kinked for a while now as you can see the tubing near the outlet barb had memory effect of a collapsed tubing... maybe this is a possible reason why i didn't gain much in max fsb on water cooled chipset ??

eva2000

Pushing it hard hehe nice PB for 1M