Note:
- Super Pi 32M doesn't mean 100% stable but it's a rough guide as to stability of memory until other windows stability tests and benchmarks are done. Please read my AMD64 Overclocking Guide's Windows Stability section at http://i4memory.com/AMD64 as to the procedure in which I test memory and overclocking on AMD64.
Decided to swap over to my
2x 512MB Corsair XMS3500C2v1.1 BH-5 memory for the rest of the tests since they run cooler and clock higher than my 2x 512MB OCZ PC3200 Gold UTT BH-5
2x 512MB Corsair XMS3500C2v1.1 BH-5
Click on image for the larger full picture.
2600Mhz
==============================
10x 260HTT = 2600mhz
@260mhz 2-2-2-5 7-14-2222 at 3.47v
FSB Bus Frequency: 260
LDT/FSB Frequency Ratio: 5x
CPU/FSB Frequency Ratio: 10x
RD580 HT PLL Speed: High
HT Bus NMOS Drive Strength: 5
HT Bus PMOS Drive Strength: 5
HT Bus Receiver Impendence: 5
CPU HT Bus Drive Strength: Strong
K8 Cool & Quiet Support: Disabled
CPU VID Control: 1.5v (set higher due to low vcore + high vdimm issue)
CPU VID Special Control: AUTO
DRAM Voltage Control: 3.47v
SB PCIE Voltage: 1.8v
NB Analogue Voltage: 1.34v
LDT Bus Voltage: 1.34v
NB Core Voltage: 1.34v
DRAM Frequency Set: 200 (1:1)
CPC: Enabled
CAS (tCL): 2
tRCP: 2
tRAS: 5
tRP: 2
tRC: 7
tRFC: 14
tRRD: 2
tRW: 2
tRTW: 2
tWTR: 2
tREF: 4708
Bank Interleaved: Enabled
Errata 94: Disabled
Errata 123: AUTO
Odd Divisor Correct: Disabled
DQS Skew Control: AUTO
DQS Skew Value: N/A
DRAM Drive Strength: 3 (weak)
DRAM Data Drive Strength: 2 (-33%)
DIMM 1/2 Clock Timing Skew: AUTO
DIMM 3/4 Clock Timing Skew: 300ps delay
Max Async Latency: 7ns
Read Preamble Time: 5ns
IdleCycle Limit: 16clks
Dynamic Counter: Disabled
R/W Queue Bypass: 16x
Bypass Max: 7x
Burst Length: 4
3000Mhz
==============================
10x300HTT = 3000mhz
@250mhz 2-2-2-5 7-14-2222 at 3.44v
FSB Bus Frequency: 300
LDT/FSB Frequency Ratio: 4x (tried 5x but system didn't boot even with NMOS/PMOS drive strength @31 so dropped it to 4x)
CPU/FSB Frequency Ratio: 10x
RD580 HT PLL Speed: High
HT Bus NMOS Drive Strength: 5
HT Bus PMOS Drive Strength: 5
HT Bus Receiver Impendence: 5
CPU HT Bus Drive Strength: Strong
K8 Cool & Quiet Support: Disabled
CPU VID Control: 1.5v (set higher due to low vcore + high vdimm issue)
CPU VID Special Control: AUTO
DRAM Voltage Control: 3.44v
SB PCIE Voltage: 1.8v
NB Analogue Voltage: 1.34v
LDT Bus Voltage: 1.34v
NB Core Voltage: 1.34v
DRAM Frequency Set: 166
CPC: Enabled
CAS (tCL): 2
tRCP: 2
tRAS: 5
tRP: 2
tRC: 7
tRFC: 14
tRRD: 2
tRW: 2
tRTW: 2
tWTR: 2
tREF: 4708
Bank Interleaved: Enabled
Errata 94: Disabled
Errata 123: AUTO
Odd Divisor Correct: Disabled
DQS Skew Control: AUTO
DQS Skew Value: N/A
DRAM Drive Strength: 3 (weak)
DRAM Data Drive Strength: 2 (-33%)
DIMM 1/2 Clock Timing Skew: AUTO
DIMM 3/4 Clock Timing Skew: 300ps delay
Max Async Latency: 8ns
Read Preamble Time: 5ns
IdleCycle Limit: 16clks
Dynamic Counter: Disabled
R/W Queue Bypass: 16x
Bypass Max: 7x
Burst Length: 4
Super Pi v1.5 32M
==============================
10x300HTT = 3000mhz
@250mhz 2-2-2-5 7-14-2222 at 3.44v
FSB Bus Frequency: 300
LDT/FSB Frequency Ratio: 4x (tried 5x but system didn't boot even with NMOS/PMOS drive strength @31 so dropped it to 4x)
CPU/FSB Frequency Ratio: 10x
RD580 HT PLL Speed: High
HT Bus NMOS Drive Strength: 5
HT Bus PMOS Drive Strength: 5
HT Bus Receiver Impendence: 5
CPU HT Bus Drive Strength: Strong
K8 Cool & Quiet Support: Disabled
CPU VID Control: 1.5v (set higher due to low vcore + high vdimm issue)
CPU VID Special Control: AUTO
DRAM Voltage Control: 3.44v
SB PCIE Voltage: 1.8v
NB Analogue Voltage: 1.34v
LDT Bus Voltage: 1.34v
NB Core Voltage: 1.34v
DRAM Frequency Set: 166
CPC: Enabled
CAS (tCL): 2
tRCP: 2
tRAS: 5
tRP: 2
tRC: 7
tRFC: 14
tRRD: 2
tRW: 2
tRTW: 2
tWTR: 2
tREF: 4708
Bank Interleaved: Enabled
Errata 94: Disabled
Errata 123: AUTO
Odd Divisor Correct: Disabled
DQS Skew Control: AUTO
DQS Skew Value: N/A
DRAM Drive Strength: 3 (weak)
DRAM Data Drive Strength: 2 (-33%)
DIMM 1/2 Clock Timing Skew: AUTO
DIMM 3/4 Clock Timing Skew: 300ps delay
Max Async Latency: 8ns
Read Preamble Time: 5ns
IdleCycle Limit: 16clks
Dynamic Counter: Enabled
R/W Queue Bypass: 16x
Bypass Max: 7x
Burst Length: 4
Super Pi v1.5 32M
==============================
10x300HTT = 3000mhz
@250mhz 2-2-2-5 7-12-2212 at 3.44v
FSB Bus Frequency: 300
LDT/FSB Frequency Ratio: 4x (tried 5x but system didn't boot even with NMOS/PMOS drive strength @31 so dropped it to 4x)
CPU/FSB Frequency Ratio: 10x
RD580 HT PLL Speed: High
HT Bus NMOS Drive Strength: 5
HT Bus PMOS Drive Strength: 5
HT Bus Receiver Impendence: 5
CPU HT Bus Drive Strength: Strong
K8 Cool & Quiet Support: Disabled
CPU VID Control: 1.5v (set higher due to low vcore + high vdimm issue)
CPU VID Special Control: AUTO
DRAM Voltage Control: 3.44v
SB PCIE Voltage: 1.8v
NB Analogue Voltage: 1.34v
LDT Bus Voltage: 1.34v
NB Core Voltage: 1.34v
DRAM Frequency Set: 166
CPC: Enabled
CAS (tCL): 2
tRCP: 2
tRAS: 5
tRP: 2
tRC: 7
tRFC: 12
tRRD: 2
tRW: 2
tRTW: 1
tWTR: 2
tREF: 4708
Bank Interleaved: Enabled
Errata 94: Disabled
Errata 123: AUTO
Odd Divisor Correct: Disabled
DQS Skew Control: AUTO
DQS Skew Value: N/A
DRAM Drive Strength: 3 (weak)
DRAM Data Drive Strength: 2 (-33%)
DIMM 1/2 Clock Timing Skew: AUTO
DIMM 3/4 Clock Timing Skew: 300ps delay
Max Async Latency: 8ns
Read Preamble Time: 5ns
IdleCycle Limit: 16clks
Dynamic Counter: Enabled
R/W Queue Bypass: 16x
Bypass Max: 7x
Burst Length: 8
Super Pi v1.5 32M
==============================
10x300HTT = 3000mhz
@250mhz 2-2-2-0 7-12-0211 at 3.44v
Memtest86+ v1.65 bandwidth = 3006MB/s
FSB Bus Frequency: 300
LDT/FSB Frequency Ratio: 4x (tried 5x but system didn't boot even with NMOS/PMOS drive strength @31 so dropped it to 4x)
CPU/FSB Frequency Ratio: 10x
RD580 HT PLL Speed: High
HT Bus NMOS Drive Strength: 5
HT Bus PMOS Drive Strength: 5
HT Bus Receiver Impendence: 5
CPU HT Bus Drive Strength: Strong
K8 Cool & Quiet Support: Disabled
CPU VID Control: 1.5v (set higher due to low vcore + high vdimm issue)
CPU VID Special Control: AUTO
DRAM Voltage Control: 3.44v
SB PCIE Voltage: 1.8v
NB Analogue Voltage: 1.34v
LDT Bus Voltage: 1.34v
NB Core Voltage: 1.34v
DRAM Frequency Set: 166
CPC: Enabled
CAS (tCL): 2
tRCP: 2
tRAS: 0
tRP: 2
tRC: 7
tRFC: 12
tRRD: 0
tRW: 2
tRTW: 1
tWTR: 1
tREF: 4708
Bank Interleaved: Enabled
Errata 94: Disabled
Errata 123: AUTO
Odd Divisor Correct: Disabled
DQS Skew Control: AUTO
DQS Skew Value: N/A
DRAM Drive Strength: 3 (weak)
DRAM Data Drive Strength: 2 (-33%)
DIMM 1/2 Clock Timing Skew: AUTO
DIMM 3/4 Clock Timing Skew: 150ps delay
Max Async Latency: 8ns
Read Preamble Time: 4.5ns
IdleCycle Limit: 0clks
Dynamic Counter: Enabled
R/W Queue Bypass: 16x
Bypass Max: 7x
Burst Length: 8
Super Pi v1.5 32M
The above 23min 59.297s time managed to beat my DFI NF4 Ultra-D time of 23min 59.641s.
Everest Home:
Read =
7,142 MB/s
Write =
3,361 MB/s
Latency =
36.2 ns
Sandra 2005 Lite SR3
Buffered =
7,486 / 7,419
Unbuffered =
3,717 / 3,847
==============================
3100Mhz
==============================
10x 310HTT = 3100mhz
@258mhz 2-2-2-5 7-14-2222 at 3.5v bios setting = 3.48v bios or 3.43v windows
FSB Bus Frequency: 310
LDT/FSB Frequency Ratio: 4x (tried 5x but system didn't boot even with NMOS/PMOS drive strength @31 so dropped it to 4x)
CPU/FSB Frequency Ratio: 10x
RD580 HT PLL Speed: High
HT Bus NMOS Drive Strength: 5
HT Bus PMOS Drive Strength: 5
HT Bus Receiver Impendence: 5
CPU HT Bus Drive Strength: Strong
K8 Cool & Quiet Support: Disabled
CPU VID Control: 1.55v (set higher due to low vcore + high vdimm issue)
CPU VID Special Control: * 104.3%
DRAM Voltage Control: 3.5v
SB PCIE Voltage: 1.8v
NB Analogue Voltage: 1.34v
LDT Bus Voltage: 1.34v
NB Core Voltage: 1.34v
DRAM Frequency Set: 166
CPC: Enabled
CAS (tCL): 2
tRCP: 2
tRAS: 5
tRP: 2
tRC: 7
tRFC: 14
tRRD: 2
tRW: 2
tRTW: 2
tWTR: 2
tREF: 4708
Bank Interleaved: Enabled
Errata 94: Disabled
Errata 123: AUTO
Odd Divisor Correct: Disabled
DQS Skew Control: AUTO
DQS Skew Value: N/A
DRAM Drive Strength: 3 (weak)
DRAM Data Drive Strength: 2 (-33%)
DIMM 1/2 Clock Timing Skew: AUTO
DIMM 3/4 Clock Timing Skew: 450ps delay
key to stablising super pi 32M!
Max Async Latency: 8ns
Read Preamble Time: 5ns
IdleCycle Limit: 16clks
Dynamic Counter: Enabled
R/W Queue Bypass: 16x
Bypass Max: 7x
Burst Length: 4
==============================
10x 310HTT = 3100mhz
@258mhz 2-2-2-5 7-14-2212 at 3.5v bios setting = 3.48v bios or 3.43v windows
FSB Bus Frequency: 310
LDT/FSB Frequency Ratio: 4x (tried 5x but system didn't boot even with NMOS/PMOS drive strength @31 so dropped it to 4x)
CPU/FSB Frequency Ratio: 10x
RD580 HT PLL Speed: High
HT Bus NMOS Drive Strength: 5
HT Bus PMOS Drive Strength: 5
HT Bus Receiver Impendence: 5
CPU HT Bus Drive Strength: Strong
K8 Cool & Quiet Support: Disabled
CPU VID Control: 1.55v (set higher due to low vcore + high vdimm issue)
CPU VID Special Control: * 104.3%
DRAM Voltage Control: 3.5v
SB PCIE Voltage: 1.8v
NB Analogue Voltage: 1.34v
LDT Bus Voltage: 1.34v
NB Core Voltage: 1.34v
DRAM Frequency Set: 166
CPC: Enabled
CAS (tCL): 2
tRCP: 2
tRAS: 5
tRP: 2
tRC: 7
tRFC: 14
tRRD: 2
tRW: 2
tRTW: 1
tWTR: 2
tREF: 4708
Bank Interleaved: Enabled
Errata 94: Disabled
Errata 123: AUTO
Odd Divisor Correct: Disabled
DQS Skew Control: AUTO
DQS Skew Value: N/A
DRAM Drive Strength: 3 (weak)
DRAM Data Drive Strength: 2 (-33%)
DIMM 1/2 Clock Timing Skew: AUTO
DIMM 3/4 Clock Timing Skew: 450ps delay
key to stablising super pi 32M!
Max Async Latency: 8ns
Read Preamble Time: 5ns
IdleCycle Limit: 16clks
Dynamic Counter: Enabled
R/W Queue Bypass: 16x
Bypass Max: 7x
Burst Length: 4
==============================
10x 310HTT = 3100mhz
@258mhz 2-2-2-0 7-12-0212 at 3.5v bios setting = 3.48v bios or 3.43v windows
Memtest86+ v1.65 bandwidth = 3106MB/s
FSB Bus Frequency: 310
LDT/FSB Frequency Ratio: 4x (tried 5x but system didn't boot even with NMOS/PMOS drive strength @31 so dropped it to 4x)
CPU/FSB Frequency Ratio: 10x
RD580 HT PLL Speed: High
HT Bus NMOS Drive Strength: 5
HT Bus PMOS Drive Strength: 5
HT Bus Receiver Impendence: 5
CPU HT Bus Drive Strength: Strong
K8 Cool & Quiet Support: Disabled
CPU VID Control: 1.55v (set higher due to low vcore + high vdimm issue)
CPU VID Special Control: * 104.3%
DRAM Voltage Control: 3.5v
SB PCIE Voltage: 1.8v
NB Analogue Voltage: 1.34v
LDT Bus Voltage: 1.34v
NB Core Voltage: 1.34v
DRAM Frequency Set: 166
CPC: Enabled
CAS (tCL): 2
tRCP: 2
tRAS: 0
tRP: 2
tRC: 7
tRFC: 12
tRRD: 0
tRW: 2
tRTW: 1
tWTR: 2
tREF: 4708
Bank Interleaved: Enabled
Errata 94: Disabled
Errata 123: AUTO
Odd Divisor Correct: Disabled
DQS Skew Control: AUTO
DQS Skew Value: N/A
DRAM Drive Strength: 3 (weak)
DRAM Data Drive Strength: 2 (-33%)
DIMM 1/2 Clock Timing Skew: AUTO
DIMM 3/4 Clock Timing Skew: 450ps delay
key to stablising super pi 32M!
Max Async Latency: 8ns
Read Preamble Time: 5ns
IdleCycle Limit: 0clks
Dynamic Counter: Enabled
R/W Queue Bypass: 16x
Bypass Max: 7x
Burst Length: 4
This CFX3200-DR 32M time of 23m 13.344s also beats my best DFI NF4 Ultra-D 32M time of 23m 13.922s below
==============================
.