EK Supreme LT + FESER 480 (DFI UT X58-T3EH8)
This is a discussion on EK Supreme LT + FESER 480 (DFI UT X58-T3EH8) within the Cooling forums, part of the Hardware category; 4/28 beta bios and new max bclk validation @235bclk with 6-7-6-20 timings! so close to sub 9min 32M pi at ...
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4/28 beta bios and new max bclk validation @235bclk with 6-7-6-20 timings! so close to sub 9min 32M pi at <3900Mhz! ![]() sub 4000Mhz 32M ![]() Max BCLK ![]() ![]() Super Pi 1M to 32M
![]() System:
Bios settings used. Code: Genie BIOS Setting CPU Feature Set VR Current Limit Max: Disabled Thermal Management Control: Disabled EIST Function: Disabled CxE Function: Disabled Execute Disable Bit: Disabled Virtualization Technology: Disabled ***** Logical Processor Setting ***** Intel HT Technology: Enabled Active Processor Cores: All DRAM Timing Channel Interleave Setting: AUTO Rank Interleave Setting: AUTO Memory LowGap: 1792M DRAM Command Rate: AUTO CAS Latency Time (tCL): 6 RAS# to CAS# Delay (tRCD): 7 RAS# Precharge (tRP): 6 Precharge Delay (tRAS): 20 REF to ACT Delay (tRFC): AUTO Write to PRE Delay (tWR): AUTO Rank Write to Read (tWTR): AUTO ACT to ACT Delay (tRRD): AUTO Row Cycle Time (tRC): 31 Read CAS# Precharge (tRTP): AUTO Four ACT WIN Time (tFAW): 31 Ch1 Round trip latency: AUTO (-15 to +16) Ch2 Round trip latency: AUTO (-15 to +16) Ch3 Round trip latency: AUTO (-15 to +16) tREFI: AUTO Voltage Setting O.C. Shut Down Free: Enable O.C.S.D.F CPU VID Control: 1.4500v CPU VID Special Add Limit: Disabled CPU VID Special Add: 103.30% Vcore Droop Control: Disabled DRAM Bus Voltage: 1.71v DRAM PWM Switch Frequency: Nominal DRAM PWM Phase Control: 2 Phase Operation CPU VTT Special Add: 0.0875v CPU VTT Voltage: 1.53v VTT PWM Switch Frequency: Nominal VTT PWM Phase Control: 2 Phase Operation CPU PLL Voltage: 1.80v IOH/ICH 1.1V Voltage: 1.29v IOH Analog Voltage: 1.20v ICH 1.5 Voltage: 1.5v ICH 1.05V Voltage: 1.05v DIMM 1/2 DQ/DQSTB Bus VREF: -00.0% DIMM 3/4 DQ/DQSTB Bus VREF: -00.0% DIMM 5/6 DQ/DQSTB Bus VREF: -00.0% ADDR/CMD VREF Control: Disabled x DIMM 1/2 ADDR/CMD Bus VREF: 110 x DIMM 3/4 ADDR/CMD Bus VREF: 110 x DIMM 5/6 ADDR/CMD Bus VREF: 110 CPU QPI Drive Strength: Normal IOH QPI Drive Strength: Normal Exit Setup Shut down: Mode 2 O.C. Fail Retry Counter: Enabled O.C. Fail CMOS Reload: Disabled PPM Function: Enabled Turbo Mode Function: Disabled 1 core Max Turbo Ratio: 22x 2 core Max Turbo Ratio: 21x 3 core Max Turbo Ratio: 21x 4 core Max Turbo Ratio: 21x CPU Non-Turbo Clock Ratio: 19x * BCLK/UCLK/QPI Controller Settings * QPI Control Settings: Enabled QPI Link Fast Mode: Enabled QPI Frequency: AUTO CPU Base Clock (BCLK): 230 Mhz Boot Up CPU Base Clock: AUTO PCIE Clock: 110 Mhz DRAM Frequency: 8xx Memory multipliers UnCore Frequency: 16x Uncore multipliers CPU Spread Spectrum: Disabled PCIE Spread Spectrum: Disabled |
| Last edited by eva2000; 01-05-2009 at 10:57 AM. | |
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| | #11 (permalink) |
| Senior Member Join Date: Jul 16 2007 Location: Puerto Rico
Posts: 1,589
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Very nice H2O set up there george i like it a lot , thats a monster heat killer for sure ) around an i7 plattform on H2O For Cooling. Im most interested on that cpu block . Good luck on your new adventures Angelo. |
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| | #12 (permalink) |
| Administrator | Sure hoping there's more - did 4652mhz super pi 32m on air, so hoping 4700+ mhz on H20 for 32M ![]() By chispy Sure is, updated above post with linx load temps @20x206 = 4104mhz at 1.392v - not even over 68C max
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| | #16 (permalink) |
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Yeah I know the feeling didn't have free time so dragged out this water cooling loop build by weeks ![]() But worth it as you see 4309Mhz at 1.488v linx 5 pass stable ! |
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| core i7 h20, ek supreme lt 1366, feser 480, x58 |
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) around an i7 plattform on H2O For Cooling. Im most interested on that cpu block
. Good luck on your new adventures 












