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11-06-2009, 02:57 AM
#4 (permalink)
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2x2GB Kingston HyperX T1 2000CAS8 Elpida 50mm Hyper modules pretty hard to find stable points even for just HyperPi dual 32M run. So far with skew and other voltage tweaks set, managed to pull off DDR3-1820Mhz 8-8-8-24 AUTO CMD rate is apparently 2T at 1.723v vdimm.
BIOS : 1104
Code:
Ai Overclock Tuner : Manual
Oc From Cpu Levet Up : Auto
Oc From Memory Level Up : Auto
FSB Frequency : 455
CPU ratio sitting : 8.5
CPU configuration :
--------------------------- :
C1E support : disabled
Cpu TM function : disabled
Max CPUID value limit : disabled
Vanderpool technology : disabled
Execute disable bit : disabled
Core multi-processing : enabled
* CPU clock skew : Auto
* NB clok skew : Auto
FSB Strap to North Bridge : 266FSB
PCIE Frequency : 103
DRAM Frequency : DDR3-1823mhz
DRAM Command Rate : AUTO
DRAM Timing Control : Manual
1ST INFORMATION
CAS# latency : : 8
RAS# to CAS# delay : : 8
RAS# PRE time : 8
RAS# ACT time : 24
RAS# to RAS# delay : AUTO
REF cycle time : AUTO
WRITE recovery time : AUTO
READ to PRE time : AUTO
2ND INFORMATION
READ to WRITE delay(S/D) : AUTO
WRITE to READ delay(S) : AUTO
WRITE to READ delay(D) : AUTO
READ to READ delay(S) : 9
READ to READ delay(D) : 11
WRITE to WRITE delay(S) : 9
WRITE to WRITE delay(D) : 11
3RD INFORMATION
WRITE to PRE delay : AUTO
READ to PRE delay : AUTO
PRE to PRE delay : AUTO
ALL PRE to ACT delay : AUTO
ALL PRE to REF delay : AUTO
DRAM Static Read Control : disabled or AUTO
DRAM Dynamic Write Control : disabled or AUTO
DRAM Skew Control :
------------------------------ :
DRAM CMD skew on channel A : auto
DRAM CLK skew on DIMM A1 : auto
DRAM CLK skew on DIMM A2 : advance 300ps
DRAM CTL skew on DIMM A1 : auto
DRAM CLT skew on DIMM A2 : delay 100ps
DRAM CMD skew on channel B : auto
DRAM CLK skew on DIMM B1 : auto
DRAM CLK skew on DIMM B2 : advance 250ps
DRAM CTL skew on DIMM B1 : auto
DRAM CTL skew on DIMM B2 : auto
Ai Clock Twister: AUTO
Ai Transaction Booster: AUTO /
-- Manual -- = AUTO
Common Performance Level : 08
Pull-in of CHA PH1 : disabled :
Pull in of CHA PH2 : disabled :
Pull in of CHB PH1 : disabled :
Pull in of CHB PH2 : disabled :
-- Manual --
EPU II phase control : auto or full phase
CPU Voltage : 1.28750v
Load-line calibration : Disabled
CPU PLL voltage : 1.56406v
FSB termination voltage : 1.28566v
CPU GTLVref(0) : auto
CPU GTLVref(1) : auto
CPU GTLVref(2) : auto
CPU GTLVref(3) : auto
NB GTLVref : auto
North bridge voltage : 1.59656v
DRAM voltage : 1.72362v
NB DDRVref : -17.5mv
DDR3 channel A Vref : -02.5mv
DDR3 channel B Vref : auto
South bridge 1.5 voltage : 1.56406v
South bridge 1.05 voltage : 1.06039v
CPU spread spectrum : disabled
PCIE spread spectrum : disabled
Memory Remap Feature: Enabled
not sure how other elpida 50mm hyper compare on Rampage Extreme/X48 DDR3 boards in terms of mhz to vdimm scaling ?